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Testing A Cmos Operational Amplifier Circuit Using A Combination Of Oscillation And Iddq Test Methods, Pavan K. Alli
Testing A Cmos Operational Amplifier Circuit Using A Combination Of Oscillation And Iddq Test Methods, Pavan K. Alli
LSU Master's Theses
This work presents a case study, which attempts to improve the fault diagnosis and testability of the oscillation testing methodology applied to a typical two-stage CMOS operational amplifier. The proposed test method takes the advantage of good fault coverage through the use of a simple oscillation based test technique, which needs no test signal generation and combines it with quiescent supply current (IDDQ) testing to provide a fault confirmation. A built in current sensor (BICS), which introduces insignificant performance degradation of the circuit-under-test (CUT), has been utilized to monitor the power supply quiescent current changes in the CUT. The testability …
Iddq Testing Of A Cmos First Order Sigma-Delta Modulator Of An 8-Bit Oversampling Adc, Anand K. Chamakura
Iddq Testing Of A Cmos First Order Sigma-Delta Modulator Of An 8-Bit Oversampling Adc, Anand K. Chamakura
LSU Master's Theses
This work presents IDDQ testing of a CMOS first order sigma-delta modulator of an 8-bit oversampling analog-to-digital converter using a built-in current sensor [BICS]. Gate-drain, source-drain, gate-source and gate-substrate bridging faults are injected using fault injection transistors. All the four faults cause varying fault currents and are successfully detected by the BICS at a good operation speed. The BICS have a negligible impact on the performance of the modulator and an external pin is provided to completely cut-off the BICS from the modulator. The modulator was designed and fabricated in 1.5 μm n-well CMOS process. The decimator was designed on …