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An Fpga-Based Hardware Accelerator For The Digital Image Correlation Engine, Keaten Stokke
An Fpga-Based Hardware Accelerator For The Digital Image Correlation Engine, Keaten Stokke
Graduate Theses and Dissertations
The work presented in this thesis was aimed at the development of a hardware accelerator for the Digital Image Correlation engine (DICe) and compare two methods of data access, USB and Ethernet. The original DICe software package was created by Sandia National Laboratories and is written in C++. The software runs on any typical workstation PC and performs image correlation on available frame data produced by a camera. When DICe is introduced to a high volume of frames, the correlation time is on the order of days. The time to process and analyze data with DICe becomes a concern when …
Optimizing Performance And Scalability On Hybrid Mpsocs, Hongyuan Ding
Optimizing Performance And Scalability On Hybrid Mpsocs, Hongyuan Ding
Graduate Theses and Dissertations
Hardware accelerators are capable of achieving significant performance improvement. But design- ing hardware accelerators lacks the flexibility and the productivity. Combining hardware accelerators with multiprocessor system-on-chip (MPSoC) is an alternative way to balance the flexibility, the productivity, and the performance. However, without appropriate programming model it is still a challenge to achieve parallelism on a hybrid (MPSoC) with with both general-purpose processors and dedicated accelerators. Besides, increasing computation demands with limited power budget require more energy-efficient design without performance degradation in embedded systems and mobile computing platforms. Reconfigurable computing with emerging storage technologies is an alternative to enable the optimization …