Engineering Commons^™

Asynchronous Advanced Encryption Standard Hardware With Random Noise Injection For Improved Side-Channel Attack Resistance, Siva Pavan Kumar Kotipalli, Yong-Bin Kim, Minsu Choi

Electrical and Computer Engineering Faculty Research & Creative Works

This work presents the design, hardware implementation, and performance analysis of novel asynchronous AES (advanced encryption standard) Key Expander and Round Function, which offer increased side-channel attack (SCA) resistance. These designs are based on a delay-insensitive (DI) logic paradigm known as null convention logic (NCL), which supports useful properties for resisting SCAs including dual-rail encoding, clock-free operation, and monotonic transitions. Potential benefits include reduced and more uniform switching activities and reduced signal-to-noise (SNR) ratio. A novel method to further augment NCL AES hardware with random voltage scaling technique is also presented for additional security. Thereby, the proposed components leak significantly …