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Dynamic Repeater With Booster Enhancement For Fast Switching Speed And Propagation In Long Interconnect, Kaushik Reddy Katpally

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A System-on-a-Chip (SoC) has millions of transistors connected by wires or so called Interconnects. As CMOS technologies scale down, SoC becomes more complex and denser. The delays of basic cells decrease, hereby improving logic gate and logic block delay. However, long wires connecting logic blocks still contribute significant delays, which limit SoC's speed performance.

In this thesis, we take a practical approach towards reducing propagation delay in long wire (Interconnect). A dynamic repeater with Booster enhancement circuit is presented and analyzed in this regard. Both switching speed and Interconnect propagation delay are significantly improved upon locally enabling the Booster to …