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Hysteretic Controlled Dc-Dc Converters, Shweta Chauhan
Hysteretic Controlled Dc-Dc Converters, Shweta Chauhan
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Switched-mode DC-DC converters are widely used in applications requiring step-up and step-down of DC voltages or currents. These converters find their use in portable applications such as laptops and smart phones, radio-frequency power amplifiers, as light emitting diode (LED) drivers, etc. The power converters consist of a switching network, energy storage elements such as inductors and capacitors, and a load resistor. Transformers are used in converters, which require isolation. The switching network comprises of MOSFETs and diodes. With improvement in the VLSI technology, smaller MOSFETs with increased power handling capability are pushing the speed of operation of these power converters …
16-Bit Digital Adder Design In 250nm And 64-Bit Digital Comparator Design In 90nm Cmos Technologies, Naga Venkata Vijaya Krishna Boppana
16-Bit Digital Adder Design In 250nm And 64-Bit Digital Comparator Design In 90nm Cmos Technologies, Naga Venkata Vijaya Krishna Boppana
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High speed, low power, and area efficient adders and comparators continue to play a key role in hardware implementation of digital signal processing applications. Adders based on Complimentary Pass Transistor Logic (CPL) are power and area efficient, but are slower compared to Square Root Carry Select (SQRT-CS) based adders. This thesis demonstrates a unique custom designed 16-bit adder in 250-nm CMOS technology to obtain fast and power/area efficient features by combining CPL and CS logic. Comparing the results obtained for proposed 16-bit Linear CPL/CS adder with the BEC (Binary Excess-1 Code) based low power SQRT-CS adder, the delay is reduced …
6 Ghz Rf Cmos Active Inductor Band Pass Filter Design And Process Variation Detection, Shuo Li
6 Ghz Rf Cmos Active Inductor Band Pass Filter Design And Process Variation Detection, Shuo Li
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A 90nm CMOS active inductor band pass filter with automatic peak detection is demonstrated in this thesis. The active inductor band pass filter has a better performance than the passive band pass filter in on-chip circuit design, due to small area, larger gain and tunable frequency. However, process variation makes the active inductor band pass filter hard to be used widely in many applications. To settle this issue, an automatic voltage peak detector is introduced to detect the process variation direction and hope to be used to control the active inductor band pass filter center frequency and gain. The designed …
Multi-Finger Mosfet Low Noise Amplifier Performance Analysis, Xiaomeng Zhang
Multi-Finger Mosfet Low Noise Amplifier Performance Analysis, Xiaomeng Zhang
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Multi-finger layout technique has been extensively used in Nano-scale CMOS circuit design due to the increased circuit performance compared to a single finger layout. However choosing a finger width (W_f) and number of fingers (N_f) to optimize circuit performance is a challenging problem. In this thesis, the performances of 2.4GHz and 6.0GHz single ended low noise amplifiers (LNA) with fixed total transistor widths in 90nm CMOS technology are analyzed as function of number of fingers, bias voltage (V_bias) and channel length (L). The results show that the drain to source current, transconductance and effective gate capacitance increase with increasing number …
Adaptive I/Q Mismatch Compensation For Wideband Receiver, Linda Zhu
Adaptive I/Q Mismatch Compensation For Wideband Receiver, Linda Zhu
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Wide working bandwidth is one of the main concerns in digital wideband receiver. The traditional digital receiver covers only one Nyquist zone, which bandwidth range is from DC to half of the sampling frequency. By utilizing in-phase/quadrature (I/Q) channels, wideband receiver is able to double the working bandwidth, which covers from DC to half of the sampling frequency and also from negative half of the sampling frequency to DC. However, I/Q mismatch in reality introduces unwanted signals, which significantly reduce the system performance and the quality of the received signals. In this thesis, an adaptive I/Q mismatch compensation technique is …
Impact Of Sar Image Formation Quality On Target Separability, Cody A. Lawyer
Impact Of Sar Image Formation Quality On Target Separability, Cody A. Lawyer
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The polar format algorithm (PFA) allows the use of computationally efficient fast Fourier transforms in synthetic aperture radar (SAR) image formation, but introduces phase errors when making the far-field approximations that facilitate this approach. The phase errors cause spatially variant distortion and defocus in the formed image. These effects may complicate target recognition applications. To limit the impact of defocus, scene size is usually limited such that the maximum quadratic phase error within an image falls below some threshold. This thesis looks at how distortion and defocus affects the classification of targets, with the hope of developing an application-driven scene …