Open Access. Powered by Scholars. Published by Universities.®
Articles 1 - 3 of 3
Full-Text Articles in Engineering
Inhibited Spontaneous Emission By Photonic Band Gaps In A Square Lattice Of Periodic Dielectric Medium, Abdullah Al-Ghamdi
Inhibited Spontaneous Emission By Photonic Band Gaps In A Square Lattice Of Periodic Dielectric Medium, Abdullah Al-Ghamdi
Masters Theses
The concepts of band theory for electrons can be employed to describe the behavior of electromagnetic waves propagating in two-dimensional, periodic dielectric structures. These two-dimensional, periodic structures can produce photonic band gaps in which the spontaneous emission by atoms embedded in the structure is prohibited and as a result the performance of many semiconductor devices can be enhanced. The calculations are based on finding the eigenvalues of the algebraic equation for the frequencies of electromagnetic waves moving in a square lattice composed of square dielectric rods with different dielectric constants.
Channel Routing And Compaction: An Integrated Approach, Roshan A. Gidwani
Channel Routing And Compaction: An Integrated Approach, Roshan A. Gidwani
Masters Theses
An attempt is made at integrating channel routing gnd compaction. A new gridless three-layer channel router based on an integrated approach to channel routing and compaction is presented. Routing is based on combined constraint graphs. Nets are selected from the input net list based on the criteria of ancestor and descendant weights in the combined constraint graphs. Compaction is done immediately after some nets are routed by using a via-segment graph. The router and compacter work hand-in-hand, i.e., the changes made by the compacter are available to the router, which enables the router to route more efficiently. Experimental results show …
A Modified Parallel Fault Simulator For Combinational Circuits, Shih-Ming Li
A Modified Parallel Fault Simulator For Combinational Circuits, Shih-Ming Li
Masters Theses
The most commonly used model for fault analysis is called the "Stuck-At" model. With this model, a faulty gate input and/or output is modeled as Stuck-at-0 (s--a-0) or Stuck-at-1 (s-a-1). After a certain number of test vectors are applied to a network, the percentage fault coverage is computed. This computed value relates to the percentage of stuck-at faults detectable at the output. Various studies have been made to enhance the performance of fault simulators. In this paper, a modified parallel simulator MODPAR for combinational circuits is presented. A comparison of simulation results from MODPAR is made with that of SCIRTSS …