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Electrical and Computer Engineering

University of Kentucky

Theses/Dissertations

2008

Native-pair floating-point unit residual VHDL

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Hdl Implementation And Analysis Of A Residual Register For A Floating-Point Arithmetic Unit, Akil Kaveti Jan 2008

Hdl Implementation And Analysis Of A Residual Register For A Floating-Point Arithmetic Unit, Akil Kaveti

University of Kentucky Master's Theses

Processors used in lower-end scientific applications like graphic cards and video game consoles have IEEE single precision floating-point hardware [23]. Double precision offers higher precision at higher implementation cost and lower performance. The need for high precision computations in these applications is not enough to justify the use double precision hardware and the extra hardware complexity needed [23]. Native-pair arithmetic offers an interesting and feasible solution to this problem. This technique invented by T. J. Dekker uses single-length floating-point numbers to represent higher precision floating-point numbers [3]. Native-pair arithmetic has been proposed by Dr. William R. Dieter and Dr. Henry …