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Programmable Multiple Input Translinear Elements, Haw-Jing Jo, Guillermo Serrano, Paul Hasler, David Anderson, Bradley Minch
Programmable Multiple Input Translinear Elements, Haw-Jing Jo, Guillermo Serrano, Paul Hasler, David Anderson, Bradley Minch
Bradley Minch
Large networks composed of multiple input translinear elements (MITEs) have been typically limited by the mismatches between individual MITEs. This paper presents the methodology that allows for such systems to be feasible through the application of floating-gate programming techniques. We introduce designs for a programmable MITE, and demonstrate the ability to systematically reduce offsets through accurate programming of example circuits.
Synthesis Of Multiple-Input Translinear Element Log-Domain Filters, Bradley Minch
Synthesis Of Multiple-Input Translinear Element Log-Domain Filters, Bradley Minch
Bradley Minch
I present a simple procedure for synthesizing multiple-input translinear element (MITE) log-domain filters from state-space descriptions. We can obtain such state-space descriptions from a variety of sources, and the procedure that I describe can be utilized regardless of the source of the description. We can often derive such descriptions conveniently from already extant filters that have been previously implemented using a different class of filters. I shall illustrate the synthesis procedure by deriving two simple MITE log-domain filters from single-ended voltage-mode OTA-C filter prototypes-I synthesize both a first-order lowpass filter and a fully tunable second-order lowpass filter.
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Bradley Minch
Independently driven double-gate MOSFETs (DGFETs) facilitate design of analog circuits under digital logic constraints and provide in-circuit parameter adaptability through threshold voltage control. Threshold voltagetuning is achieved by biasing one of the two gates where as strong coupling of surface potentials at the two interfaces provides a low resistance feedback path. The geometry also allows a back-floating gate NVRAM structure with superior scalability and floating gate related analog applications without any read disturbance. This paper gives examples across breadth of circuits where this tunability is exploited.