Engineering Commons^™

Phase Noise Analyses And Measurements In The Hybrid Memristor-Cmos Phase-Locked Loop Design And Devices Beyond Bulk Cmos, Naheem Olakunle Adesina

LSU Doctoral Dissertations

Phase-locked loop (PLLs) has been widely used in analog or mixed-signal integrated circuits. Since there is an increasing market for low noise and high speed devices, PLLs are being employed in communications. In this dissertation, we investigated phase noise, tuning range, jitter, and power performances in different architectures of PLL designs. More energy efficient devices such as memristor, graphene, transition metal di-chalcogenide (TMDC) materials and their respective transistors are introduced in the design phase-locked loop.

Subsequently, we modeled phase noise of a CMOS phase-locked loop from the superposition of noises from its building blocks which comprises of a voltage-controlled oscillator, …

Phase Noise In Cmos Phase-Locked Loop Circuits, Yang Liu

LSU Doctoral Dissertations

Phase-locked loops (PLLs) have been widely used in mixed-signal integrated circuits. With the continuously increasing demand of market for high speed, low noise devices, PLLs are playing a more important role in communications. In this dissertation, phase noise and jitter performances are investigated in different types of PLL designs. Hot carrier and negative bias temperature instability effects are analyzed from simulations and experiments. Phase noise of a CMOS phase-locked loop as a frequency synthesizer circuit is modeled from the superposition of noises from its building blocks: voltage-controlled oscillator, frequency divider, phase-frequency detector, loop filter and auxiliary input reference clock. A …

Exploring The Hot-Carrier Effect On The Wireless Transceivers, Sameer R. Herlekar

LSU Doctoral Dissertations

Phase noise can be regarded as the most severe cause of performance degradation in the wireless communication systems. The hot-carriers (HCs), found in the CMOS synchronization circuits, are the high-energy charge carriers that degrade the MOSFET devices’ performance by increasing the threshold voltage required to operate the MOSFETs. The HC effect manifests itself as the phase noise whose level increases with the continued MOSFET operation and such increases result in the performance degradation of the voltage-controlled oscillator (VCO) built on the MOSFETs. The HC effect is particularly evident in the short-channel MOSFET devices. In this dissertation, we analyze the wireless …

A Study Of Phase Noise And Jitter In Submicron Cmos Phase-Locked Loop Circuits, Chi Zhang

LSU Doctoral Dissertations

Phase-locked loops (PLLs) are widely used in communication systems. With the continuously expanding of market for high speed, portable communication devices, low noise CMOS submicron integrated circuit designs of PLL for different applications are in large demand. In this dissertation, phase noise and jitter properties of PLL and its building blocks are investigated both at the physical and system levels. At the physical level, hot carrier effect in submicron MOSFETs has been considered. As one of the most dominant noise sources of PLL, the voltage-controlled oscillator (VCO) is considered when investigating the noise degradation induced by the hot carrier effect. …