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Using On-Chip Error Detection To Estimate Fpga Design Sensitivity To Configuration Upsets, Andrew Mark Keller
Using On-Chip Error Detection To Estimate Fpga Design Sensitivity To Configuration Upsets, Andrew Mark Keller
Theses and Dissertations
SRAM-based FPGAs provide valuable computation resources and reconfigurability; however, ionizing radiation can cause designs operating on these devices to fail. The sensitivity of an FPGA design to configuration upsets, or its SEU sensitivity, is an indication of a design's failure rate. SEU mitigation techniques can reduce the SEU sensitivity of FPGA designs in harsh radiation environments. The reliability benefits of these techniques must be determined before they can be used in mission-critical applications and can be determined by comparing the SEU sensitivity of an FPGA design with and without these techniques applied to it. Many approaches can be taken to …
High-Speed Programmable Fpga Configuration Memory Access Using Jtag, Ammon Bradley Gruwell
High-Speed Programmable Fpga Configuration Memory Access Using Jtag, Ammon Bradley Gruwell
Theses and Dissertations
Over the past couple of decades Field Programmable Gate Arrays (FPGAs) have become increasingly useful in a variety of domains. This is due to their low cost and flexibility compared to custom ASICs. This increasing interest in FPGAs has driven the need for tools that both qualify and improve the reliability of FPGAs for applications where the reconfigurability of FPGAs makes them vulnerable to radiation upsets such as in aerospace environments. Such tools ideally work with a wide variety of devices, are highly programmable but simple to use, and perform tasks at relatively high speeds. Of the various FPGA configuration …