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Full-Text Articles in Engineering
Synthesis Of Multiple-Input Translinear Element Networks, Bradley Minch, Paul Hasler, Chris Diorio
Synthesis Of Multiple-Input Translinear Element Networks, Bradley Minch, Paul Hasler, Chris Diorio
Bradley Minch
We describe two systematic procedures for synthesizing multiple-input translinear element (MITE) networks that produce an output current that is equal to product of a number of input currents, each of which is raised to an arbitrary rational power. By using the first procedure, we obtain a MITE network, called a two-layer network, that is relatively insensitive to mismatch in the MITE weight values. By using the second procedure, we arrive at a MITE network, called a cascade network, that reduces the fan-in required of each MITE. We illustrate each ofthese procedures with an example.
A Floating-Gate Technology For Digital Cmos Processes, Bradley Minch, Paul Hasler
A Floating-Gate Technology For Digital Cmos Processes, Bradley Minch, Paul Hasler
Bradley Minch
We discuss the possibility of developing high-quality floating-gate memories and circuits in digital CMOS technologies that have only one layer of polysilicon. Here, the primary concern is whether or not we can get adequate control-gate linearity from MOS capacitors. We employ two experimental procedures to address this issue and find acceptable floating-gate circuit behaviour with MOS capacitors. First, we simultaneously characterize an MOS capacitor and a linear capacitor; the experimental data show that MOS capacitors behave similarly to linear capacitors over a finite, but usable range. Second, we characterize two typical floating-gateMOS circuit primitives, a floating-gate amplifier and a multiple-input …
Adaptive Translinear Analog Signal Processing: A Prospectus, Eric Mcdonald, Kofi Odame, Bradley Minch
Adaptive Translinear Analog Signal Processing: A Prospectus, Eric Mcdonald, Kofi Odame, Bradley Minch
Bradley Minch
We have devised a systematic method of transforming high-level time-domain descriptions of linear and nonlinear adaptive signal-processing algorithms into compact, continuous-time analog circuitry using basic units called multiple-input translinear elements (MITEs). In this paper, we describe the current state of the art and illustrate the method with an example of an analog phase-locked loop (PLL).
Inverting The Bipolar Differential Pair For Low-Voltage Applications, Bradley Minch
Inverting The Bipolar Differential Pair For Low-Voltage Applications, Bradley Minch
Bradley Minch
In this paper, the author presents a new bipolar differential transconductor that functions just like an emitter-degenerated differential pair, except for the following: it operates on a low power supply; it has a rail-to-rail common-mode input-voltage range; permits a wide output-voltage swing; has a transconductance gain that is nearly constant with the common-mode input voltage; and requires only n-p-n transistors in the signal path. We describe intuitively how the circuit functions and provide DC measurements from a prototype circuit, breadboarded from a quad TPQ3904 and a thick-film resistor array demonstrating proper operation on a single-ended 1.2-V power supply.
Synthesis Of Multiple-Input Translinear Element Log-Domain Filters, Bradley Minch
Synthesis Of Multiple-Input Translinear Element Log-Domain Filters, Bradley Minch
Bradley Minch
I present a simple procedure for synthesizing multiple-input translinear element (MITE) log-domain filters from state-space descriptions. We can obtain such state-space descriptions from a variety of sources, and the procedure that I describe can be utilized regardless of the source of the description. We can often derive such descriptions conveniently from already extant filters that have been previously implemented using a different class of filters. I shall illustrate the synthesis procedure by deriving two simple MITE log-domain filters from single-ended voltage-mode OTA-C filter prototypes-I synthesize both a first-order lowpass filter and a fully tunable second-order lowpass filter.
A Long-Channel Model For The Asymmetric Double-Gate Mosfet Valid In All Regions Of Operation, Abhishek Kammula, Bradley Minch
A Long-Channel Model For The Asymmetric Double-Gate Mosfet Valid In All Regions Of Operation, Abhishek Kammula, Bradley Minch
Bradley Minch
We present a physically based, continuous analytical model for long-channel double-gate MOSFETs. The model is particularly well suited for implementation in circuit simulators due to the simple expressions for the current andthe continuous nature of the derivatives of the current which improves convergence behavior.
A Transistor-Only Circuit Model Of The Autozeroing Floating-Gate Amplifier, Paul Hasler, Matt Kucic, Bradley Minch
A Transistor-Only Circuit Model Of The Autozeroing Floating-Gate Amplifier, Paul Hasler, Matt Kucic, Bradley Minch
Bradley Minch
We developed an transistor-only version of our autozeroing floating-gate amplifier (AFGA). We use a subthreshold transistor to model the behavior of an electron-tunneling device, and we use another subthreshold transistor to model the behavior of pFET hot-electron injection. We have derived analytical models that completely characterize the amplifier and that are in good agreement with experimental data. This circuit is a bandpass filter, and behaves similarly to the AFGA with different operating parameters. Both the low-frequency and high-frequency cutoffs are controlled electronically, as is done in continuous-time filters. This circuit has a low-frequency cutoff at frequencies above 1 Hz, and …
A Simple Way To Extend The Common-Mode Input-Voltage Range Of The Mos Differential Pair, Bradley Minch
A Simple Way To Extend The Common-Mode Input-Voltage Range Of The Mos Differential Pair, Bradley Minch
Bradley Minch
In this paper, we describe a simple technique involving indirect negative feedback that extends the useable common-mode input-voltage range of the MOS differential pair by a saturation voltage. In this method, we use a replica differential pair to sense when the bias transistor supplying the tail current falls out of saturation. We then set the bias voltage so that the sum of the two differential-pair output currents is equal to the bias current. We present experimental results from a version of the differential pair that was fabricated in a 0.5 μm CMOS process along with a comparison with an identical …
Evolution Of A Folded Floating-Gate Differential Pair, Bradley Minch
Evolution Of A Folded Floating-Gate Differential Pair, Bradley Minch
Bradley Minch
The author presents a folded floating-gate MOS (FGMOS) differential pair circuit that is capable of simultaneously providing a rail-to-rail common-mode input voltage range and a rail-to-rail output voltage swing with a low power-supply voltage. In this configuration, the voltage drop across the bias current source is folded up into the same range over which the output voltages swing, facilitating low-voltage operation. The floating-gate charge can be used to trim out the offset voltage of the differential pair and to reduce the required power-supply voltage for a given bias current level. The author provides both a qualitative description of how the …