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Trojan Detection Expansion Of Structural Checking, Zachary Chapman Dec 2023

Trojan Detection Expansion Of Structural Checking, Zachary Chapman

Graduate Theses and Dissertations

With the growth of the integrated circuit (IC) market, there has also been a rise in demand for third-party soft intellectual properties (IPs). However, the growing use of such Ips makes it easier for adversaries to hide malicious code, like hardware Trojans, into these designs. Unlike software Trojan detection, hardware Trojan detection is still an active research area. One proposed approach to this problem is the Structural Checking tool, which can detect hardware Trojans using two methodologies. The first method is a matching process, which takes an unknown design and attempts to determine if it might contain a Trojan by …


Deep Learning Frameworks For Accelerated Magnetic Resonance Image Reconstruction Without Ground Truths, Ibsa Kumara Jalata Dec 2023

Deep Learning Frameworks For Accelerated Magnetic Resonance Image Reconstruction Without Ground Truths, Ibsa Kumara Jalata

Graduate Theses and Dissertations

Magnetic Resonance Imaging (MRI) is typically a slow process because of its sequential data acquisition. To speed up this process, MR acquisition is often accelerated by undersampling k-space signals and solving an ill-posed problem through a constrained optimization process. Image reconstruction from under-sampled data is posed as an inverse problem in traditional model-based learning paradigms. While traditional methods use image priors as constraints, modern deep learning methods use supervised learning with ground truth images to learn image features and priors. However, in some cases, ground truth images are not available, making supervised learning impractical. Recent data-centric learning frameworks such as …


Towards Multi-Modal Interpretable Video Understanding, Quang Sang Truong Dec 2023

Towards Multi-Modal Interpretable Video Understanding, Quang Sang Truong

Graduate Theses and Dissertations

This thesis introduces an innovative approach to video comprehension, which simulates human perceptual mechanisms and establishes a comprehensible and coherent narrative representation of video content. At the core of this approach lies the creation of a Visual-Linguistic (VL) feature for an interpretable video portrayal and an adaptive attention mechanism (AAM) aimed at concentrating solely on principal actors or pertinent objects while modeling their interconnections. Taking cues from the way humans disassemble scenes into visual and non-visual constituents, the proposed VL feature characterizes a scene via three distinct modalities: (i) a global visual environment, providing a broad contextual comprehension of the …


A Memory-Centric Customizable Domain-Specific Fpga Overlay For Accelerating Machine Learning Applications, Atiyehsadat Panahi Aug 2022

A Memory-Centric Customizable Domain-Specific Fpga Overlay For Accelerating Machine Learning Applications, Atiyehsadat Panahi

Graduate Theses and Dissertations

Low latency inferencing is of paramount importance to a wide range of real time and userfacing Machine Learning (ML) applications. Field Programmable Gate Arrays (FPGAs) offer unique advantages in delivering low latency as well as energy efficient accelertors for low latency inferencing. Unfortunately, creating machine learning accelerators in FPGAs is not easy, requiring the use of vendor specific CAD tools and low level digital and hardware microarchitecture design knowledge that the majority of ML researchers do not possess. The continued refinement of High Level Synthesis (HLS) tools can reduce but not eliminate the need for hardware-specific design knowledge. The designs …


Structural Checking Tool Restructure And Matching Improvements, Derek Taylor May 2022

Structural Checking Tool Restructure And Matching Improvements, Derek Taylor

Graduate Theses and Dissertations

With the rising complexity and size of hardware designs, saving development time and cost by employing third-party intellectual property (IP) into various first-party designs has become a necessity. However, using third-party IPs introduces the risk of adding malicious behavior to the design, including hardware Trojans. Different from software Trojan detection, the detection of hardware Trojans in an efficient and cost-effective manner is an ongoing area of study and has significant complexities depending on the development stage where Trojan detection is leveraged. Therefore, this thesis research proposes improvements to various components of the soft IP analysis methodology utilized by the Structural …


Modeling Damage Spread, Assessment, And Recovery Of Critical Systems, Justin Burns May 2022

Modeling Damage Spread, Assessment, And Recovery Of Critical Systems, Justin Burns

Graduate Theses and Dissertations

Critical infrastructure systems have recently become more vulnerable to attacks on their data systems through internet connectivity. If an attacker is successful in breaching a system’s defenses, it is imperative that operations are restored to the system as quickly as possible. This thesis focuses on damage assessment and recovery following an attack. A literature review is first conducted on work done in both database protection and critical infrastructure protection, then the thesis defines how damage affects the relationships between data and software. Then, the thesis proposes a model using a graph construction to show the cascading affects within a system …


Live Access Control Policy Error Detection Through Hardware, Bryce Mendenhall May 2022

Live Access Control Policy Error Detection Through Hardware, Bryce Mendenhall

Graduate Theses and Dissertations

Access Control (AC) is a widely used security measure designed to protect resources and infrastructure in an information system. The integrity of the AC policy is crucial to the protection of the system. Errors within an AC policy may cause many vulnerabilities such as information leaks, information loss, and malicious activities. Thus, such errors must be detected and promptly fixed. However, current AC error detection models do not allow for real-time error detection, nor do they provide the source of errors. This thesis presents a live error detection model called LogicDetect which utilizes emulated Boolean digital logic circuits to provide …


Optimized Damage Assessment And Recovery Through Data Categorization In Critical Infrastructure System., Shruthi Ramakrishnan May 2022

Optimized Damage Assessment And Recovery Through Data Categorization In Critical Infrastructure System., Shruthi Ramakrishnan

Graduate Theses and Dissertations

Critical infrastructures (CI) play a vital role in majority of the fields and sectors worldwide. It contributes a lot towards the economy of nations and towards the wellbeing of the society. They are highly coupled, interconnected and their interdependencies make them more complex systems. Thus, when a damage occurs in a CI system, its complex interdependencies make it get subjected to cascading effects which propagates faster from one infrastructure to another resulting in wide service degradations which in turn causes economic and societal effects. The propagation of cascading effects of disruptive events could be handled efficiently if the assessment and …


Computational Frameworks For Multi-Robot Cooperative 3d Printing And Planning, Laxmi Prasad Poudel Jul 2021

Computational Frameworks For Multi-Robot Cooperative 3d Printing And Planning, Laxmi Prasad Poudel

Graduate Theses and Dissertations

This dissertation proposes a novel cooperative 3D printing (C3DP) approach for multi-robot additive manufacturing (AM) and presents scheduling and planning strategies that enable multi-robot cooperation in the manufacturing environment. C3DP is the first step towards achieving the overarching goal of swarm manufacturing (SM). SM is a paradigm for distributed manufacturing that envisions networks of micro-factories, each of which employs thousands of mobile robots that can manufacture different products on demand. SM breaks down the complicated supply chain used to deliver a product from a large production facility from one part of the world to another. Instead, it establishes a network …


Signal Processing And Data Analysis For Real-Time Intermodal Freight Classification Through A Multimodal Sensor System., Enrique J. Sanchez Headley Jul 2021

Signal Processing And Data Analysis For Real-Time Intermodal Freight Classification Through A Multimodal Sensor System., Enrique J. Sanchez Headley

Graduate Theses and Dissertations

Identifying freight patterns in transit is a common need among commercial and municipal entities. For example, the allocation of resources among Departments of Transportation is often predicated on an understanding of freight patterns along major highways. There exist multiple sensor systems to detect and count vehicles at areas of interest. Many of these sensors are limited in their ability to detect more specific features of vehicles in traffic or are unable to perform well in adverse weather conditions. Despite this limitation, to date there is little comparative analysis among Laser Imaging and Detection and Ranging (LIDAR) sensors for freight detection …


Promoting Diversity In Academic Research Communities Through Multivariate Expert Recommendation, Omar Salman Jul 2021

Promoting Diversity In Academic Research Communities Through Multivariate Expert Recommendation, Omar Salman

Graduate Theses and Dissertations

Expert recommendation is the process of identifying individuals who have the appropriate knowledge and skills to achieve a specific task. It has been widely used in the educational environment mainly in the hiring process, paper-reviewer assignment, and assembling conference program committees. In this research, we highlight the problem of diversity and fair representation of underrepresented groups in expertise recommendation, factors that current expertise recommendation systems rarely consider. We introduce a novel way to model experts in academia by considering demographic attributes in addition to skills. We use the h-index score to quantify skills for a researcher and we identify five …


Low-Power And Reconfigurable Asynchronous Asic Design Implementing Recurrent Neural Networks, Spencer Nelson May 2021

Low-Power And Reconfigurable Asynchronous Asic Design Implementing Recurrent Neural Networks, Spencer Nelson

Graduate Theses and Dissertations

Artificial intelligence (AI) has experienced a tremendous surge in recent years, resulting in high demand for a wide array of implementations of algorithms in the field. With the rise of Internet-of-Things devices, the need for artificial intelligence algorithms implemented in hardware with tight design restrictions has become even more prevalent. In terms of low power and area, ASIC implementations have the best case. However, these implementations suffer from high non-recurring engineering costs, long time-to-market, and a complete lack of flexibility, which significantly hurts their appeal in an environment where time-to-market is so critical. The time-to-market gap can be shortened through …


Non-Volatile Memory Adaptation In Asynchronous Microcontroller For Low Leakage Power And Fast Turn-On Time, Jean Pierre Thierry Habimana May 2021

Non-Volatile Memory Adaptation In Asynchronous Microcontroller For Low Leakage Power And Fast Turn-On Time, Jean Pierre Thierry Habimana

Graduate Theses and Dissertations

This dissertation presents an MSP430 microcontroller implementation using Multi-Threshold NULL Convention Logic (MTNCL) methodology combined with an asynchronous non-volatile magnetic random-access-memory (RAM) to achieve low leakage power and fast turn-on. This asynchronous non-volatile RAM is designed with a Spin-Transfer Torque (STT) memory device model and CMOS transistors in a 65 nm technology. A self-timed Quasi-Delay-Insensitive 1 KB STT RAM is designed with an MTNCL interface and handshaking protocol. A replica methodology is implemented to handle write operation completion detection for long state-switching delays of the STT memory device. The MTNCL MSP430 core is integrated with the STT RAM to create …


Development Of A Reference Design For Intrusion Detection Using Neural Networks For A Smart Inverter, Ammar Mohammad Khan Jan 2021

Development Of A Reference Design For Intrusion Detection Using Neural Networks For A Smart Inverter, Ammar Mohammad Khan

Graduate Theses and Dissertations

The purpose of this thesis is to develop a reference design for a base level implementation of an intrusion detection module using artificial neural networks that is deployed onto an inverter and runs on live data for cybersecurity purposes, leveraging the latest deep learning algorithms and tools. Cybersecurity in the smart grid industry focuses on maintaining optimal standards of security in the system and a key component of this is being able to detect cyberattacks. Although researchers and engineers aim to design such devices with embedded security, attacks can and do still occur. The foundation for eventually mitigating these attacks …


Ppmexplorer: Using Information Retrieval, Computer Vision And Transfer Learning Methods To Index And Explore Images Of Pompeii, Cindy Roullet Dec 2020

Ppmexplorer: Using Information Retrieval, Computer Vision And Transfer Learning Methods To Index And Explore Images Of Pompeii, Cindy Roullet

Graduate Theses and Dissertations

In this dissertation, we present and analyze the technology used in the making of PPMExplorer: Search, Find, and Explore Pompeii. PPMExplorer is a software tool made with data extracted from the Pompei: Pitture e Mosaic (PPM) volumes. PPM is a valuable set of volumes containing 20,000 historical annotated images of the archaeological site of Pompeii, Italy accompanied by extensive captions. We transformed the volumes from paper, to digital, to searchable. PPMExplorer enables archaeologist researchers to conduct and check hypotheses on historical findings. We present a theory that such a concept is possible by leveraging computer generated correlations between artifacts using …


Stay-At-Home Motor Rehabilitation: Optimizing Spatiotemporal Learning On Low-Cost Capacitive Sensor Arrays, Reid Sutherland May 2020

Stay-At-Home Motor Rehabilitation: Optimizing Spatiotemporal Learning On Low-Cost Capacitive Sensor Arrays, Reid Sutherland

Graduate Theses and Dissertations

Repeated, consistent, and precise gesture performance is a key part of recovery for stroke and other motor-impaired patients. Close professional supervision to these exercises is also essential to ensure proper neuromotor repair, which consumes a large amount of medical resources. Gesture recognition systems are emerging as stay-at-home solutions to this problem, but the best solutions are expensive, and the inexpensive solutions are not universal enough to tackle patient-to-patient variability. While many methods have been studied and implemented, the gesture recognition system designer does not have a strategy to effectively predict the right method to fit the needs of a patient. …


A Simulation Tool For Evaluating The Environmental Impacts Of Management Scenarios For Modern Broiler Production Systems, Martin Andrew Christie Aug 2019

A Simulation Tool For Evaluating The Environmental Impacts Of Management Scenarios For Modern Broiler Production Systems, Martin Andrew Christie

Graduate Theses and Dissertations

The purpose of this work is to provide a simulation tool that allows broiler production practitioners and researchers to simulate the effects of farm design and management practices on resource consumption and environmental impacts. This tool allows the user to design unique farms and simulates on farm processes required to raise broiler chicks to a marketable age. The use can input data such as farm location, broiler breed, flock size, ration type, barn dimensions, and climate control equipment specifications. The algorithms used to simulate broiler breed specific feed intake, broiler weight gain, and other on farm processes such as heating, …


Towards A Prototype Platform For Ros Integrations On A Ground Robot, Taylor Joseph Linville Whitaker May 2019

Towards A Prototype Platform For Ros Integrations On A Ground Robot, Taylor Joseph Linville Whitaker

Graduate Theses and Dissertations

The intent of this work was to develop, evaluate, and demonstrate a prototype robot platform on which ROS integrations could be explored. With observations of features and requirements of existing industrial and service mobile ground robots, a platform was designed and outfitted with appropriate components to enable the most common operational-critical functionalities and account for unforeseen components and features. The resulting Arlo Demonstration Robot accommodates basic mapping, localization, and navigation in both two and three-dimensional space as well as additional safety and teleoperation features. The control system is centered around the Zybo Z7 FPGA SoC hosting a custom hardware design. …


Automatic Performance Optimization On Heterogeneous Computer Systems Using Manycore Coprocessors, Chenggang Lai Dec 2018

Automatic Performance Optimization On Heterogeneous Computer Systems Using Manycore Coprocessors, Chenggang Lai

Graduate Theses and Dissertations

Emerging computer architectures and advanced computing technologies, such as Intel’s Many Integrated Core (MIC) Architecture and graphics processing units (GPU), provide a promising solution to employ parallelism for achieving high performance, scalability and low power consumption. As a result, accelerators have become a crucial part in developing supercomputers. Accelerators usually equip with different types of cores and memory. It will compel application developers to reach challenging performance goals. The added complexity has led to the development of task-based runtime systems, which allow complex computations to be expressed as task graphs, and rely on scheduling algorithms to perform load balancing between …


Smart Surge Irrigation Using Microcontroller Based Embedded Systems And Internet Of Things, Prashant Dinkar Borhade Dec 2018

Smart Surge Irrigation Using Microcontroller Based Embedded Systems And Internet Of Things, Prashant Dinkar Borhade

Graduate Theses and Dissertations

Surge Irrigation is a type of furrow irrigation and one of many efficient irrigation techniques. It is one of the economical techniques and requires minimum labor for monitoring it. In surge irrigation, water is applied intermittently to a field to achieve uniform distribution of water along the furrows, which is important while irrigating, as it ensures that there is enough water near the root zone of the crop. The uneven distribution can cause a loss in crop productivity.

Surge irrigation uses a surge valve, which is an electro-mechanical device that irrigates a field. The commercial surge valves available on the …


A Proposed Approach To Hybrid Software-Hardware Application Design For Enhanced Application Performance, Alex Shipman Jan 2018

A Proposed Approach To Hybrid Software-Hardware Application Design For Enhanced Application Performance, Alex Shipman

Graduate Theses and Dissertations

One important aspect of many commercial computer systems is their performance; therefore, system designers seek to improve the performance next-generation systems with respect to previous generations. This could mean improved computational performance, reduced power consumption leading to better battery life in mobile devices, smaller form factors, or improvements in many areas. In terms of increased system speed and computation performance, processor manufacturers have been able to increase the clock frequency of processors up to a point, but now it is more common to seek performance gains through increased parallelism (such as a processor having more processor cores on a single …


Energy And Performance Balancing Architecture For Asynchronous Data Processing Platforms, Chien-Wei Lo Aug 2017

Energy And Performance Balancing Architecture For Asynchronous Data Processing Platforms, Chien-Wei Lo

Graduate Theses and Dissertations

The semiconductor industry has been increasingly focused on the energy consumption and heat generation in CMOS-based integrated circuits (ICs) for its dominating impact on the system performance and reliability. Without clock-related timing constraints, asynchronous circuits have demonstrated unique flexibility in performance-energy tradeoffs compared to synchronous designs. This dissertation work presents the architecture capable of balancing energy and performance for asynchronous digital signal processing circuits using the Multi-Threshold NULL Convention Logic (MTNCL). Architecture implementing user-configurable adaptive dynamic voltage scaling (DVS) and data processing core disabling based on the detection and parameterization of system throughput are developed for MTNCL parallel homogeneous and …


Power Efficient High Temperature Asynchronous Microcontroller Design, Nathan William Kuhns May 2017

Power Efficient High Temperature Asynchronous Microcontroller Design, Nathan William Kuhns

Graduate Theses and Dissertations

There is an increasing demand for dependable and efficient digital circuitry capable of operating in high temperature environments. Extreme temperatures have adverse effects on traditional silicon synchronous systems because of the changes in delay and setup and hold times caused by the variances in each device’s threshold voltage. This dissertation focuses on the design of the major functionality of an asynchronous 8051 microcontroller in Raytheon’s high temperature Silicon Carbide process, rated for operation over 300ºC. The microcontroller is designed in NULL Convention Logic, for which the traditional bus architecture used for data transfer would consume a large amount of power. …


Just In Time Assembly (Jita) - A Run Time Interpretation Approach For Achieving Productivity Of Creating Custom Accelerators In Fpgas, Sen Ma Dec 2016

Just In Time Assembly (Jita) - A Run Time Interpretation Approach For Achieving Productivity Of Creating Custom Accelerators In Fpgas, Sen Ma

Graduate Theses and Dissertations

The reconfigurable computing community has yet to be successful in allowing programmers to access FPGAs through traditional software development flows. Existing barriers that prevent programmers from using FPGAs include: 1) knowledge of hardware programming models, 2) the need to work within the vendor specific CAD tools and hardware synthesis. This thesis presents a series of published papers that explore different aspects of a new approach being developed to remove the barriers and enable programmers to compile accelerators on next generation reconfigurable manycore architectures. The approach is entitled Just In Time Assembly (JITA) of hardware accelerators. The approach has been defined …


Data Integrity Verification In Cloud Computing, Katanosh Morovat May 2015

Data Integrity Verification In Cloud Computing, Katanosh Morovat

Graduate Theses and Dissertations

Cloud computing is an architecture model which provides computing and storage capacity as a service over the internet. Cloud computing should provide secure services for users and owners of data as well. Cloud computing services are a completely internet-based technology where data are stored and maintained in the data center of a cloud provider. Lack of appropriate control over the data might incur several security issues. As a result, some data stored in the cloud must be protected at all times. These types of data are called sensitive data. Sensitive data is defined as data that must be protected against …


Study Of Parallel Programming Models On Computer Clusters With Accelerators, Chenggang Lai Dec 2014

Study Of Parallel Programming Models On Computer Clusters With Accelerators, Chenggang Lai

Graduate Theses and Dissertations

In order to reach exascale computing capability, accelerators have become a crucial part in developing supercomputers. This work examines the potential of two latest acceleration technologies, Intel Many Integrated Core (MIC) Architecture and Graphics Processing Units (GPUs). This thesis applies three benchmarks under 3 different configurations, MPI+CPU, MPI+GPU, and MPI+MIC. The benchmarks include intensely communicating application, loosely communicating application, and embarrassingly parallel application. This thesis also carries out a detailed study on the scalability and performance of MIC processors under two programming models, i.e., offload model and native model, on the Beacon computer cluster.

According to different benchmarks, the results …


A Deep Search Architecture For Capturing Product Ontologies, Tejeshwar Sangameswaran Dec 2014

A Deep Search Architecture For Capturing Product Ontologies, Tejeshwar Sangameswaran

Graduate Theses and Dissertations

This thesis describes a method to populate very large product ontologies quickly. We discuss a deep search architecture to text-mine online e-commerce market places and build a taxonomy of products and their corresponding descriptions and parent categories. The goal is to automatically construct an open database of products, which are aggregated from different online retailers. The database contains extensive metadata on each object, which can be queried and analyzed. Such a public database currently does not exist; instead the information currently resides siloed within various organizations. In this thesis, we describe the tools, data structures and software architectures that allowed …


Software Porting Of A 3d Reconstruction Algorithm To Razorcam Embedded System On Chip, Kevin Curtis Gunn Aug 2014

Software Porting Of A 3d Reconstruction Algorithm To Razorcam Embedded System On Chip, Kevin Curtis Gunn

Graduate Theses and Dissertations

A method is presented to calculate depth information for a UAV navigation system from Keypoints in two consecutive image frames using a monocular camera sensor as input and the OpenCV library. This method was first implemented in software and run on a general-purpose Intel CPU, then ported to the RazorCam Embedded Smart-Camera System and run on an ARM CPU onboard the Xilinx Zynq-7000. The results of performance and accuracy testing of the software implementation are then shown and analyzed, demonstrating a successful port of the software to the RazorCam embedded system on chip that could potentially be used onboard a …


Designing Customizable Network-On-Chip With Support For Embedded Private Memory For Multi-Processor System-On-Chips, Azad Fakhari May 2014

Designing Customizable Network-On-Chip With Support For Embedded Private Memory For Multi-Processor System-On-Chips, Azad Fakhari

Graduate Theses and Dissertations

The computer industry's transition to multiprocessor systems on chip (MPSoC) architectures is increasing the need for new scalable high-bandwidth on-chip communication

backbones. Network-on-Chip (NoC) interconnects are gaining interest for serving as the on-chip communication infrastructure. The most important issues to be considered in designing a NoC are topology, routing algorithm, flow control, and buffering and also the trade-offs between performance, power, and area.

This research proposes a custom-designed NoC specifically for MPSoCs on FPGAs. The proposed design allows the communication infrastructure to seamlessly scale as the numbers of processors within the chip increases. The design adds a new level of …