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Adaptive Controller Using Runtime Partial Hardware Reconfiguration For Unmanned Aerial Vehicles (Uavs), Nikhil Thomas
Adaptive Controller Using Runtime Partial Hardware Reconfiguration For Unmanned Aerial Vehicles (Uavs), Nikhil Thomas
Graduate Theses and Dissertations
The goal of this thesis is to explore the feasibility of a multirotor controller system which can dynamically change the arm configuration of a multirotor. Currently most of the multirotor systems have to be powered down, rewired, and programmed with new firmware, to configure how many arms/motors they use to fly. The focus of our effort is to develop a Field Programmable Gate Array (FPGA) based hardware/software controller which uses dynamic partial hardware reconfiguration to switch the arm/motor configuration of a multirotor during operation. We believe that this will make a multirotor more fault tolerant and adaptive. This thesis explains …
Design And Verification Environment For High-Performance Video-Based Embedded Systems, Michael Mefenza Nentedem
Design And Verification Environment For High-Performance Video-Based Embedded Systems, Michael Mefenza Nentedem
Graduate Theses and Dissertations
In this dissertation, a method and a tool to enable design and verification of computation demanding embedded vision-based systems is presented. Starting with an executable specification in OpenCV, we provide subsequent refinements and verification down to a system-on-chip prototype into an FPGA-Based smart camera. At each level of abstraction, properties of image processing applications are used along with structure composition to provide a generic architecture that can be automatically verified and mapped to the lower abstraction level. The result is a framework that encapsulates the computer vision library OpenCV at the highest level, integrates Accelera's System-C/TLM with UVM and QEMU-OS …
Fpga Accelerated Discrete-Surf For Real-Time Homography Estimation, Andrew C. Leighner
Fpga Accelerated Discrete-Surf For Real-Time Homography Estimation, Andrew C. Leighner
Theses and Dissertations
This paper describes our hardware accelerated, FPGA implementation of SURF, named Discrete SURF, to support real-time homography estimation for close range aerial navigation. The SURF algorithm provides feature matches between a model and a scene which can be used to find the transformation between the camera and the model. Previous implementations of SURF have partially employed FPGAs to accelerate the feature detection stage of upright only image comparisons. We extend the work of previous implementations by providing an FPGA implementation that allows rotation during image comparisons in order to facilitate aerial navigation. We also expand beyond feature detection as the …