Engineering Commons^™

Methodology To Derive Resource Aware Context Adaptable Architectures For Field Programmable Gate Arrays, Harikrishna Samala

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

The design of a common architecture that can support multiple data-flow patterns (or contexts) embedded in complex control flow structures, in applications like multimedia processing, is particularly challenging when the target platform is a Field Programmable Gate Array (FPGA) with a heterogeneous mixture of device primitives. This thesis presents scheduling and mapping algorithms that use a novel area cost metric to generate resource aware context adaptable architectures. Results of a rigorous analysis of the methodology on multiple test cases are presented. Results are compared against published techniques and show an area savings and execution time savings of 46% each.

Self-Healing Cellular Automata To Correct Soft Errors In Defective Embedded Program Memories, Varun Voddi

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Static Random Access Memory (SRAM) cells in ultra-low power Integrated Circuits (ICs) based on nanoscale Complementary Metal Oxide Semiconductor (CMOS) devices are likely to be the most vulnerable to large-scale soft errors. Conventional error correction circuits may not be able to handle the distributed nature of such errors and are susceptible to soft errors themselves. In this thesis, a distributed error correction circuit called Self-Healing Cellular Automata (SHCA) that can repair itself is presented. A possible way to deploy a SHCA in a system of SRAM-based embedded program memories (ePM) for one type of chip multi-processors is also discussed. The …

Memory Architecture Template For Fast Block Matching Algorithms On Field Programmable Gate Arrays, Shant Chandrakar

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Fast Block Matching (FBM) algorithms for video compression are well suited for acceleration using parallel data-path architectures on Field Programmable Gate Arrays (FPGAs). However, designing an efficient on-chip memory subsystem to provide the required throughput to this parallel data-path architecture is a complex problem. This thesis presents a memory architecture template that can be parameterized for a given FBM algorithm, number of parallel Processing Elements (PEs), and block size. The template can be parameterized with well known exploration techniques to design efficient on-chip memory subsystems. The memory subsystems are derived for two existing FBM algorithms and are implemented on a …

Implementation Of Robot Arm Networks And Experimental Analysis Of Consensus-Based Collective Motion, Daniel Scott Stuart

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Within the field of multi-robot control, there is a large focus in research involving consensus. In this thesis two parts will be studied. The first development of this thesis is a consensus-based robot arm platform. To implement, two robotic arms are developed and studied. The most effective robot arm is then utilized to create a robot arm network testbed. Consensus is used to coordinate several robot arms and decentralize system computation. The research explores a platform to facilitate consensus on a group of robotic arms.

The second development is in Cartesian coordinate collective motion. This collective motion control combines consensus …

Dynamically Reconfigurable Systolic Array Accelerators: A Case Study With Extended Kalman Filter And Discrete Wavelet Transform Algorithms, Robert C. Barnes

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Field programmable grid arrays (FPGA) are increasingly being adopted as the primary on-board computing system for autonomous deep space vehicles. There is a need to support several complex applications for navigation and image processing in a rapidly responsive on-board FPGA-based computer. This requires exploring and combining several design concepts such as systolic arrays, hardware-software partitioning, and partial dynamic reconfiguration. A microprocessor/co-processor design that can accelerate two single precision oating-point algorithms, extended Kalman lter and a discrete wavelet transform, is presented. This research makes three key contributions. (i) A polymorphic systolic array framework comprising of recofigurable partial region-based sockets to accelerate …

Graid: A Geospatial Real-Time Aerial Image Display For A Low-Cost Autonomous Multispectral Remote Sensing Platform (Aggieair), Austin M. Jensen

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Remote sensing helps many applications like precision irrigation, habitat mapping, and traffic monitoring. However, due to shortcomings of current remote sensing platforms - like high cost, low spatial, and temporal resolution - many applications do not have access to useful remote sensing data. A team at the Center for Self-Organizing and Intelligent Systems (CSOIS) together with the Utah Water Research Laboratory (UWRL) at Utah State University has been developing a new remote sensing platform to deal with these shortcomings in order to give more applications access to remote sensing data. This platform (AggieAir) is low cost, fully autonomous, easy to …