Open Access. Powered by Scholars. Published by Universities.®
Articles 1 - 3 of 3
Full-Text Articles in American Studies
Low Power Technology Mapping And Performance Driven Placement For Field Programmable Gate Arrays, Hao, Li
Low Power Technology Mapping And Performance Driven Placement For Field Programmable Gate Arrays, Hao, Li
USF Tampa Graduate Theses and Dissertations
As technology geometries have shrunk to the deep sub-micron (DSM) region, the chip density and clock frequency of FPGAs have increased significantly. This makes computer-aided design (CAD) for FPGAs very important and challenging. Due to the increasing demands of portable devices and mobile computing, low power design is crucial in CAD nowadays. In this dissertation, we present a framework to optimize power consumption for technology mapping onto FPGAs. We propose a low-power technology mapping scheme which is able to predict the impact of choosing a subnetwork covering on the ultimate mapping solution. We dynamically update the power estimation for a …
Vhdl Coding Style Guidelines And Synthesis: A Comparative Approach, Shahabuddin L. Inamdar
Vhdl Coding Style Guidelines And Synthesis: A Comparative Approach, Shahabuddin L. Inamdar
USF Tampa Graduate Theses and Dissertations
With the transistor density on an integrated circuit doubling every 18 months, Moore’s law seems likely to hold for another decade at least. This exponential growth in digital circuits has led to its increased complexity, better performance and is quickly getting less manageable for design engineers.
To combat this complexity, CAD tools have been introduced and are still being continuously developed, which prove to be of great help in the digital industry. One of the technologies, that is rapidly evolving as an industry standard, is the Very High Speed Integrated Circuit Hardware Description Language, (VHDL), language. The VHDL standard language …
Fault Tolerant Design Verification Through The Use Of Laser Fault Injection, Paris D. Wiley
Fault Tolerant Design Verification Through The Use Of Laser Fault Injection, Paris D. Wiley
USF Tampa Graduate Theses and Dissertations
Laser Fault Injection (LFI) testing has been demonstrated to be a useful tool in the prediction of single event upset rates in microcircuits. In addition LFI has contributed to the basic understanding of the mechanisms that cause single event upsets. However, very little research has been performed on the viability of LFI as a tool for verifying fault tolerant designs incorporated in ASICs, FPGAs, microprocessors and embedded systems. Current fault tolerant design verification techniques such as simulation and test have several significant limitations that prevent the complete verification of a fault tolerant design. However, LFI possesses spatial, temporal and financial …