Digital Commons Network^™

Digital Beamforming Implemented In Hardware, Nicole Dulieu

Theses

Digital beamforming is a popular method used in modern communication systems. The ability to track and locate a transmitting signal adaptively is necessary in communication systems. Beamforming is one solution to this problem. Beamforming uses an array or matrix of isotropic antenna elements. This eliminates the need to create a physically larger antennas to achieve the same radiation pattern and gain of a phased array of antenna elements. Additionally, the antennas are electronically controlled allowing the radiation pattern and gain to adapt quickly. It is necessary to use a digital platform for beamforming because hardware can digitize analog signals efficiently. …

Mobility Management In Tsch-Based Industrial Wireless Networks, Marco Pettorali, Francesca Righetti, Carlo Vallati, Sajal K. Das, Giuseppe Anastasi

Computer Science Faculty Research & Creative Works

Wireless Sensor and Actuator Networks (WSANs) are an effective technology for improving the efficiency and productivity in many industrial domains and are also the building blocks for the Industrial Internet of Things (IIoT). To support this trend, the IEEE has defined the 802.5.4 Time-Slotted Channel Hopping (TSCH) protocol. Unfortunately, TSCH does not provide any mechanism to manage node mobility, while many current industrial applications involve Mobile Nodes (MNs), e.g., mobile robots or wearable devices carried by workers. In this article, we present a framework to efficiently manage mobility in TSCH networks, by proposing an enhanced version of the Synchronized Single-hop …

Soci+: An Enhanced Toolkit For Secure Outsourced Computation On Integers, Bowen Zhao, Weiquan Deng, Xiaoguo Li, Ximeng Liu, Qingqi Pei, Robert H. Deng

Research Collection School Of Computing and Information Systems

Secure outsourced computation is critical for cloud computing to safeguard data confidentiality and ensure data usability. Recently, secure outsourced computation schemes following a twin-server architecture based on partially homomorphic cryptosystems have received increasing attention. The Secure Outsourced Computation on Integers (SOCI) [1] toolkit is the state-of-the-art among these schemes which can perform secure computation on integers without requiring the costly bootstrapping operation as in fully homomorphic encryption; however, SOCI suffers from relatively large computation and communication overhead. In this paper, we propose SOCI+ which significantly improves the performance of SOCI. Specifically, SOCI+ employs a novel (2,2)-threshold Paillier cryptosystem with fast …

3d-Aware Multi-Class Image-To-Image Translation With Nerfs, Senmao Li, Joost Van De Weijer, Yaxing Wang, Fahad Shahbaz Khan, Meiqin Liu, Jian Yang

Computer Vision Faculty Publications

Recent advances in 3D-aware generative models (3D-aware GANs) combined with Neural Radiance Fields (NeRF) have achieved impressive results. However no prior works investigate 3D-aware GANs for 3D consistent multiclass image-to-image (3D-aware 121) translation. Naively using 2D-121 translation methods suffers from unrealistic shape/identity change. To perform 3D-aware multiclass 121 translation, we decouple this learning process into a multiclass 3D-aware GAN step and a 3D-aware 121 translation step. In the first step, we propose two novel techniques: a new conditional architecture and an effective training strategy. In the second step, based on the well-trained multiclass 3D-aware GAN architecture, that preserves view-consistency, we …

Kokkos-Enhanced Exampi, Evan Drake Suggs

Masters Theses and Doctoral Dissertations

Kokkos provides in-memory advanced data structures, concurrency, and algorithm to support advanced C++ parallel programming. MPI provides the most widely used message passing model for inter-node communication. Many programmers use both Kokkos and the Message Passing Interface (MPI) together. In this thesis, Kokkos is integrated within an MPI implementation to obtain performance and functionality benefits both for the MPI itself, and for applications that use both Kokkos+MPI. For instance, it will be possible in this model to pass first-class Kokkos objects directly to extended C++-based MPI APIs. In particular, efforts to achieve this type of integrated model is expressed using …

Digital Simulations Of Memristors Towards Integration With Reconfigurable Computing, Ivris Raymond

Computer Science and Computer Engineering Undergraduate Honors Theses

The end of Moore’s Law has been predicted for decades. Demand for increased parallel computational performance has been increased by improvements in machine learning. This past decade has demonstrated the ever-increasing creativity and effort necessary to extract scaling improvements in CMOS fabrication processes. However, CMOS scaling is nearing its fundamental physical limits. A viable path for increasing performance is to break the von Neumann bottleneck. In-memory computing using emerging memory technologies (e.g. ReRam, STT, MRAM) offers a potential path beyond the end of Moore’s Law. However, there is currently very little support from industry tools for designers wishing to incorporate …

Fine-Grained Commit-Level Vulnerability Type Prediction By Cwe Tree Structure, Shengyi Pan, Lingfeng Bao, Xin Xia, David Lo, Shanping Li

Research Collection School Of Computing and Information Systems

Identifying security patches via code commits to allow early warnings and timely fixes for Open Source Software (OSS) has received increasing attention. However, the existing detection methods can only identify the presence of a patch (i.e., a binary classification) but fail to pinpoint the vulnerability type. In this work, we take the first step to categorize the security patches into fine-grained vulnerability types. Specifically, we use the Common Weakness Enumeration (CWE) as the label and perform fine-grained classification using categories at the third level of the CWE tree. We first formulate the task as a Hierarchical Multi-label Classification (HMC) problem, …

An Optimized And Scalable Blockchain-Based Distributed Learning Platform For Consumer Iot, Zhaocheng Wang, Xueying Liu, Xinming Shao, Abdullah Alghamdi, Md. Shirajum Munir, Sujit Biswas

School of Cybersecurity Faculty Publications

Consumer Internet of Things (CIoT) manufacturers seek customer feedback to enhance their products and services, creating a smart ecosystem, like a smart home. Due to security and privacy concerns, blockchain-based federated learning (BCFL) ecosystems can let CIoT manufacturers update their machine learning (ML) models using end-user data. Federated learning (FL) uses privacy-preserving ML techniques to forecast customers' needs and consumption habits, and blockchain replaces the centralized aggregator to safeguard the ecosystem. However, blockchain technology (BCT) struggles with scalability and quick ledger expansion. In BCFL, local model generation and secure aggregation are other issues. This research introduces a novel architecture, emphasizing …

Model Based Systems Engineering With A Docs-As-Code Approach For The Sealion Cubesat Project, Kevin Chiu, Sean Marquez, Sharanabasaweshwara Asundi

Mechanical & Aerospace Engineering Faculty Publications

The SeaLion mission architecture team sought to create a model-based systems engineering approach to assist improving CubeSat success rates as well as for the SeaLion CubeSat project to guide an implementation for the flight software. This is important because university CubeSat teams are growing in number but often have untrained students as their core personnel. This was done using a document-as-code, or docs-as-code, approach. With this the team created tools for the systems architecture with the Mach 30 Modeling Language to create an architecture that is easy to learn and use even for newly admitted team members with little to …

Analyzing Microarchitectural Residue In Various Privilege Strata To Identify Computing Tasks, Tor J. Langehaug

Theses and Dissertations

Modern multi-tasking computer systems run numerous applications simultaneously. These applications must share hardware resources including the Central Processing Unit (CPU) and memory while maximizing each application’s performance. Tasks executing in this shared environment leave residue which should not reveal information. This dissertation applies machine learning and statistical analysis to evaluate task residue as footprints which can be correlated to identify tasks. The concept of privilege strata, drawn from an analogy with physical geology, organizes the investigation into the User, Operating System, and Hardware privilege strata. In the User Stratum, an adversary perspective is taken to build an interrogator program that …

Cmos Sensor Image-Acquisition And Image- Processing Control System Architecture, Haruka Kido

Electrical Engineering Student Publications

This report demonstrates an assessment of a PCAM camera module’s OV5640 CMOS sensor image-acquisition electrical circuit network system and hardware implementation for associated FPGA-modulated image-processing techniques using Digilent’s Zybo Z7-20 development board’s FPGA (Zynq 7000 SoC). By comparison between the control system architectures of 2 proposed Active Pixel CMOS sensor electrical network configurations (both 1 Row 1-Column Select Implementations) using electrical network transfer function derivations, time responses, Root Locus Plots, Bode Plots, and their system characteristics as preliminary analyses, FPGA-modulation of the CMOS sensor through image format adjustment is developed as an example of image properties adjustment enabled by the …

Balancing Supercapacitor Voltages In Modular Bidirectional Dc–Dc Converter Circuits, Robert Alfie S. Peña, Alaa Hijazi, Pascal Venet, Florian Errigo

Electronics, Computer, and Communications Engineering Faculty Publications

At present, passive balancing methods dominate energy storage applications, however, they suffer from a long balancing duration. In this article, we took advantage of a modular architecture, where several modular power converters replace a central dc–dc converter for fast charging and balancing of a supercapacitor stack. A strategy has been proposed to control how power is shared among the converters during the charging period in order to balance the supercapacitors. However, some converters enter control saturation due to voltage differences between supercapacitors caused by their nonuniform conditions and characteristics. The originality of this article lies in taking into account the …

A Method For Comparative Analysis Of Trusted Execution Environments, Stephano Cetola

Dissertations and Theses

The problem of secure remote computation has become a serious concern of hardware manufacturers and software developers alike. Trusted Execution Environments (TEEs) are a solution to the problem of secure remote computation in applications ranging from "chip and pin" financial transactions to intellectual property protection in modern gaming systems. While extensive literature has been published about many of these technologies, there exists no current model for comparing TEEs. This thesis provides hardware architects and designers with a set of tools for comparing TEEs. I do so by examining several properties of a TEE and comparing their implementations in several technologies. …

U-Net And Its Variants For Medical Image Segmentation: A Review Of Theory And Applications, Nahian Siddique, Paheding Sidike, Colin P. Elkin, Vijay Devabhaktuni

Michigan Tech Publications

U-net is an image segmentation technique developed primarily for image segmentation tasks. These traits provide U-net with a high utility within the medical imaging community and have resulted in extensive adoption of U-net as the primary tool for segmentation tasks in medical imaging. The success of U-net is evident in its widespread use in nearly all major image modalities, from CT scans and MRI to Xrays and microscopy. Furthermore, while U-net is largely a segmentation tool, there have been instances of the use of U-net in other applications. Given that U-net’s potential is still increasing, this narrative literature review examines …

Adaptive Aggregation Networks For Class-Incremental Learning, Yaoyao Liu, Bernt Schiele, Qianru Sun

Research Collection School Of Computing and Information Systems

Class-Incremental Learning (CIL) aims to learn a classification model with the number of classes increasing phase-by-phase. An inherent problem in CIL is the stability-plasticity dilemma between the learning of old and new classes, i.e., high-plasticity models easily forget old classes, but high-stability models are weak to learn new classes. We alleviate this issue by proposing a novel network architecture called Adaptive Aggregation Networks (AANets) in which we explicitly build two types of residual blocks at each residual level (taking ResNet as the baseline architecture): a stable block and a plastic block. We aggregate the output feature maps from these two …

Improving Multi-Threaded Qos In Clouds, Weiwei Jia

Dissertations

Multi-threading and resource sharing are pervasive and critical in clouds and data-centers. In order to ease management, save energy and improve resource utilization, multi-threaded applications from different tenants are often encapsulated in virtual machines (VMs) and consolidated on to the same servers. Unfortunately, despite much effort, it is still extremely challenging to maintain high quality of service (QoS) for multi-threaded applications of different tenants in clouds, and these applications often suffer severe performance degradation, poor scalability, unfair resource allocation, and so on.

The dissertation identifies the causes of the QoS problems and improves the QoS of multi-threaded execution with three …

A Golden Age For Computing Frontiers, A Dark Age For Computing Education?, Christof Teuscher

Electrical and Computer Engineering Faculty Publications and Presentations

There is no doubt that the body of knowledge spanned by the computing disciplines has gone through an unprecedented expansion, both in depth and breadth, over the last century. In this position paper, we argue that this expansion has led to a crisis in computing education: quite literally the vast majority of the topics of interest of this conference are not taught at the undergraduate level and most graduate courses will only scratch the surface of a few selected topics. But alas, industry is increasingly expecting students to be familiar with emerging topics, such as neuromorphic, probabilistic, and quantum computing, …

Lecture 06: The Impact Of Computer Architectures On The Design Of Algebraic Multigrid Methods, Ulrike Yang

Mathematical Sciences Spring Lecture Series

Algebraic multigrid (AMG) is a popular iterative solver and preconditioner for large sparse linear systems. When designed well, it is algorithmically scalable, enabling it to solve increasingly larger systems efficiently. While it consists of various highly parallel building blocks, the original method also consisted of various highly sequential components. A large amount of research has been performed over several decades to design new components that perform well on high performance computers. As a matter of fact, AMG has shown to scale well to more than a million processes. However, with single-core speeds plateauing, future increases in computing performance need to …

Breaking Neural Reasoning Architectures With Metamorphic Relation-Based Adversarial Examples, Alvin Chan, Lei Ma, Felix Juefei-Xu, Yew-Soon Ong, Xiaofei Xie, Minhui Xue, Yang Liu

Research Collection School Of Computing and Information Systems

The ability to read, reason, and infer lies at the heart of neural reasoning architectures. After all, the ability to perform logical reasoning over language remains a coveted goal of Artificial Intelligence. To this end, models such as the Turing-complete differentiable neural computer (DNC) boast of real logical reasoning capabilities, along with the ability to reason beyond simple surface-level matching. In this brief, we propose the first probe into DNC's logical reasoning capabilities with a focus on text-based question answering (QA). More concretely, we propose a conceptually simple but effective adversarial attack based on metamorphic relations. Our proposed adversarial attack …

A New Network Multiplier Using Modified High Order Encoder And Optimized Hybrid Adder In Cmos Technology, Pooya Asadi

Information Sciences Letters

In this paper, a new low power, high speed network multiplier is presented. For increasing performance of multiplier, a novel modified high-order encoder is proposed. Previous encoders have complicated hardware and their ability to decrease number of input operands is low. Presented encoder uses high-order algorithm and therefore reduces number of partial products efficiently. A new hybrid adder is presented which uses ideas of carry lookahead adder and ripple carry adder to modify final adder architecture. Previous carry lookahead adders have large carry network and their ability to decrease noise margin is low. It uses a DCVS carry network, which …

Processor Modules For The Classroom Development Of Physical Computers, Lakshmi Ongolu

Master’s Theses and Projects

Processors are present in almost all the electronic components available in the market now. As they perform trillions of operations per second and are complex internally. This project is to build building modules for students, who will be able to develop their own processor. The main idea is that this will help students to experience the detailed workflow of a processor and focus on design and development instead of spending time on wiring and soldering. Different components such as Program Counter, Instruction Register, Memory, Multiplexer, Adder and transceivers are designed and printed as individual modules on printed circuit boards (PCB’s). …

A Comprehensive Survey Of The Tactile Internet: State-Of-The-Art And Research Directions, Nattakorn Promwongsa, Amin Ebrahimzadeh, Diala Naboulsi, Somayeh Kianpisheh, Fatna Belqasmi, Roch Glitho, Noel Crespi, Omar Alfandi

All Works

The Internet has made several giant leaps over the years, from a fixed to a mobile Internet, then to the Internet of Things, and now to a Tactile Internet. The Tactile Internet goes far beyond data, audio and video delivery over fixed and mobile networks, and even beyond allowing communication and collaboration among things. It is expected to enable haptic communications and allow skill set delivery over networks. Some examples of potential applications are tele-surgery, vehicle fleets, augmented reality and industrial process automation. Several papers already cover many of the Tactile Internet-related concepts and technologies, such as haptic codecs, applications, …

Otter Vector Extension, Alexis A. Peralta

Computer Engineering

This paper offers an implementation of a subset of the "RISC-V 'V' Vector Extension", v0.7.x. The "RISC-V 'V' Vector Extension" is the proposed vector instruction set for RISC-V open-source architecture. Vectors are inherently data-parallel, allowing for significant performance increases. Vectors have applications in fields such as cryptography, graphics, and machine learning. A vector processing unit was added to Cal Poly's RISC-V multi-cycle architecture, known as the OTTER. Computationally intensive programs running on the OTTER Vector Extension ran over three times faster when compared to the baseline multi-cycle implementation. Memory intensive applications saw similar performance increases.

Posits: An Alternative To Floating Point Calculations, Matt Wagner

Theses

Floating point arithmetic is one of several methods of performing computations in digital designs; others include integer and fixed point computations. Fixed point utilizes a method comparable to scientific notation in the binary domain. In terms of computations, floating point is by far the most prevalent in today’s digital designs. Between the support offered by compilers, as well as for ready-to-use IP blocks, floating point units (FPU’s) are a de-facto standard for most processors. Despite its prevalence in modern designs, floating point has many flaws. One of the most common is the use of not-a-numbers (NaN’s). These are meant to …

The Design Of A Custom 32-Bit Risc Cpu And Port To Gcc Compiler Backend, Danielle Megan Fischer

Theses

This paper presents the design of a 32-bit RISC processor, which is then mapped to the backend of GCC so basic C code can be compiled successfully to the processor. There are many design decisions that go into the construction of a processor. The instruction set architecture gives away a lot of information regarding the individual instructions that the processor will have, the memory architecture, as well as how I/O peripherals will be handled. Additionally, the hardware implementation of the processor needs to be kept in mind when crating the design. Pipelining can often help with processor speed, while cache …

Spatial Indexing For System-Level Evaluation Of 5g Heterogeneous Cellular Networks, Roohollah Amiri, Eren Balevi, Jeffrey G. Andrews, Hani Mehrpouyan

Electrical and Computer Engineering Faculty Publications and Presentations

System level simulations of large 5G networks are essential to evaluate and design algorithms related to network issues such as scheduling, mobility management, interference management, and cell planning. In this paper, we look back to the idea of spatial indexing and its advantages, applications, and future potentials in accelerating large 5G network simulations. We introduce a multi-level inheritance based architecture which is used to index all elements of a heterogeneous network (HetNet) on a single geometry tree. Then, we define spatial queries to accelerate searches in distance, azimuth, and elevation. We demonstrate that spatial indexing can accelerate location-based searches by …

Sam-Sos: A Stochastic Software Architecture Modeling And Verification Approach For Complex System-Of-Systems, Ahmad Mohsin, Naeem Khalid Janjua, Syed M. S. Islam, Muhammad Ali Babar

Research outputs 2014 to 2021

A System-of-Systems (SoS) is a complex, dynamic system whose Constituent Systems (CSs) are not known precisely at design time, and the environment in which they operate is uncertain. SoS behavior is unpredictable due to underlying architectural characteristics such as autonomy and independence. Although the stochastic composition of CSs is vital to achieving SoS missions, their unknown behaviors and impact on system properties are unavoidable. Moreover, unknown conditions and volatility have significant effects on crucial Quality Attributes (QAs) such as performance, reliability and security. Hence, the structure and behavior of a SoS must be modeled and validated quantitatively to foresee any …

Computer Organization And Architecture (Ksu), Yong Shi, Dan Lo, Selena He, Mingon Kang, Sarah North

Computer Science and Information Technology Grants Collections

This Grants Collection for Computer Organization and Architecture was created under a Round Twelve ALG Textbook Transformation Grant.

Affordable Learning Georgia Grants Collections are intended to provide faculty with the frameworks to quickly implement or revise the same materials as a Textbook Transformation Grants team, along with the aims and lessons learned from project teams during the implementation process.

Documents are in .pdf format, with a separate .docx (Word) version available for download. Each collection contains the following materials:

• Linked Syllabus
• Initial Proposal
• Final Report

Understanding And Optimizing Parallel Performance In Multi-Tenant Cloud, Yong Zhao

Computer Science and Engineering Dissertations

As a critical component of resource management in multicore systems, fair schedulers in hypervisors and operating systems (OSes) must follow a simple invariant: guarantee that the computing resources such as CPU cycles are fairly allocated to each vCPU or thread. As simple as it may seem, we found this invariant is broken when parallel programs with blocking synchronization are colocated with CPU intensive programs in hypervisors such as Xen, KVM and OSes such as Linux CFS. On the other hand, schedulers in virtualized environment usually reside in two different layers: one is in the hypervisor which aims to schedule vCPU …

Design And Verification Of An Rsa Encryption Core, Gowtham Ramakrishnan

Theses

Cryptoprocessors are becoming a standard to make the data-usage more discrete. A wellknown elector-mechanical cipher machine called the “enigma machine” was used in early 20th century to encrypt all confidential military and diplomatic information. With the advent of microprocessors in late 20th century the world of cryptography revolutionized. A cryptosystem is system on chip which contains cryptography algorithms used for encryption and decryption of data. These cryptoprocessors are used in ATM’s and highly portable communication systems. Encryption and decryption are the fundamental processes behind any cryptosystem. There are many encryption and decryption algorithms available; one such algorithm is known as …