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Study Of Sac Solder Interconnect Parameters In Microelectronic Semiconductor Packaging And Their Effects On Electromigration Failure Mechanisms, Allison Theresa Osmanson
Study Of Sac Solder Interconnect Parameters In Microelectronic Semiconductor Packaging And Their Effects On Electromigration Failure Mechanisms, Allison Theresa Osmanson
Material Science and Engineering Dissertations
As the shrinkage of electronic devices becomes more appealing, so do their high capacity and efficiency. This demand for ever-shrinking sizes of electronic devices follows the trend predicted by Moore’s Law. To achieve smaller devices, reduced sizes of solder joints, Cu traces, Cu pads, and other components in packages are implemented with tighter tolerances for geometries and layouts. With each incremental change in dimension or material, new reliability challenges emerge. Electromigration (EM), the directional diffusion of atoms with the flow of electrons, has been an inevitable reliability concern for microelectronic device packaging. It is one common failure mechanism in wafer-level …