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Articles 1 - 19 of 19
Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
A Simple Low-Voltage Cascode Current Mirror With Enhanced Dynamic Performance, Bradley Minch
A Simple Low-Voltage Cascode Current Mirror With Enhanced Dynamic Performance, Bradley Minch
Bradley Minch
In this paper, we present a simple low-voltage MOS cascode current mirror featuring a step response and an output voltage swing comparable to those of a simple mirror and and output resistance comparable to that of a stacked mirror. The proposed mirror operates with an input voltage of Vdiode+VDSsat and can operate on a minimum supply of Vdiode + 2VDSsat. We validate the proposed mirror with a combination of simulated and measured results from a circuit prototyped from transistor arrays fabricated in a 0.5-μm CMOS process through MOSIS.
Synthesis Of Translinear Analog Signal Processing Systems, Eric Mcdonald, Bradley Minch
Synthesis Of Translinear Analog Signal Processing Systems, Eric Mcdonald, Bradley Minch
Bradley Minch
In this paper, we describe a structured methodology for synthesizing translinear analog signal-processing systems from high-level descriptions in the time domain. The circuits are implemented from elements called multiple-input translinear elements (MITEs). We illustrate the synthesis methodology with the simple example ofan RMS-DC converter.
Programmable Multiple Input Translinear Elements, Haw-Jing Jo, Guillermo Serrano, Paul Hasler, David Anderson, Bradley Minch
Programmable Multiple Input Translinear Elements, Haw-Jing Jo, Guillermo Serrano, Paul Hasler, David Anderson, Bradley Minch
Bradley Minch
Large networks composed of multiple input translinear elements (MITEs) have been typically limited by the mismatches between individual MITEs. This paper presents the methodology that allows for such systems to be feasible through the application of floating-gate programming techniques. We introduce designs for a programmable MITE, and demonstrate the ability to systematically reduce offsets through accurate programming of example circuits.
Synthesis Of Static And Dynamic Multiple-Input Translinear Element Networks, Bradley Minch
Synthesis Of Static And Dynamic Multiple-Input Translinear Element Networks, Bradley Minch
Bradley Minch
In this paper, we discuss the process of synthesizing static and dynamic multiple-input translinear element (MITE) networks systematically from high-level descriptions given in the time domain, in terms of static polynomial constraints and algebraic differential equations. We provide several examples, illustrating the process for both static and dynamic system constraints. Although our examples will all involve MITE networks, the early steps of the synthesis process are equally applicable to the synthesis of static and dynamic translinear-loop circuits.
A Low-Voltage Mos Cascode Current Mirror For All Current Levels, Bradley Minch
A Low-Voltage Mos Cascode Current Mirror For All Current Levels, Bradley Minch
Bradley Minch
In this paper, we describe a simple low-voltage MOS cascode current mirror that functions well at all current levels, ranging from weak inversion to strong inversion. The circuit features a wide output voltage swing and requires an input voltage of approximately one diode drop plus a saturation voltage. We present experimental results from a version of the current mirror that was fabricated in a 0.5 μm CMOS process along with a comparison with several other current mirrors with respect both to required input voltage and to output compliance voltage.
A Fully Programmable Log-Domain Bandpass Filter Using Multiple-Input Translinear Elements, Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul Hasler, Bradley Minch
A Fully Programmable Log-Domain Bandpass Filter Using Multiple-Input Translinear Elements, Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul Hasler, Bradley Minch
Bradley Minch
In this paper a second order log-domain bandpass filter using multiple input translinear elements (MITEs) operating at a 3V supply. We enhance the capabilities of the filter by utilizing programmable MITE structures as well as programmable current sources, which are covered in this paper. The synthesized bandpass filter is implemented and fabricated using these programmable translinear devices (MITEs). Experimental results are shown from circuit fabricated on a 0.5μm nwell CMOS process available through MOSIS.
Highly Linear, Wide-Dynamic-Range Multiple-Input Translinear Element Networks, Kofi Odame, Eric Mcdonald, Bradley Minch
Highly Linear, Wide-Dynamic-Range Multiple-Input Translinear Element Networks, Kofi Odame, Eric Mcdonald, Bradley Minch
Bradley Minch
In this paper, we propose a modification to the class of circuits known as multiple input translinear element (MITE) networks. Our proposed modification leads to a MITE network that is free from certain nonidealities encountered in previous implementations. Further, the new MITE network described here readily accommodates the use of bipolar junction transistors in the input and output stages, thus implying a significantly wider dynamic range than we can achieve using subthreshold MOSFETs.
Analog Vlsi Implementation Of Support Vector Machine Learning And Classification, Sheng-Yu Peng, Bradley Minch, Paul Hasler
Analog Vlsi Implementation Of Support Vector Machine Learning And Classification, Sheng-Yu Peng, Bradley Minch, Paul Hasler
Bradley Minch
We propose an analog VLSI approach to implementing the projection neural networks adapted for the supportvector machine with radial-basis kernel functions, which are realized by a proposed floating-gate bump circuit with the adjustable width. Other proposed circuits include simple current mirrors and log-domain Alters. Neither resistors nor amplifiers are employed. Therefore it is suitable for large-scale neural network implementations. We show the measurement results of the bump circuit and verify the resulting analog signal processing system on the transistor level by using a SPICE simulator. The same approach can also be applied to the support vectorregression. With these analog signal …
A Long-Channel Model For The Asymmetric Double-Gate Mosfet Valid In All Regions Of Operation, Abhishek Kammula, Bradley Minch
A Long-Channel Model For The Asymmetric Double-Gate Mosfet Valid In All Regions Of Operation, Abhishek Kammula, Bradley Minch
Bradley Minch
We present a physically based, continuous analytical model for long-channel double-gate MOSFETs. The model is particularly well suited for implementation in circuit simulators due to the simple expressions for the current andthe continuous nature of the derivatives of the current which improves convergence behavior.
Hysteretic Threshold Logic And Quasi-Delay Insensitive Asynchronous Design, Mark Neidengard, Bradley Minch
Hysteretic Threshold Logic And Quasi-Delay Insensitive Asynchronous Design, Mark Neidengard, Bradley Minch
Bradley Minch
We introduce the class of hysteretic linear-threshold (HLT) logic functions as a novel extension of linear threshold logic, and prove their general applicability for constructing state-holding Boolean functions. We then demonstrate a fusion of HLT logic with the quasi-delay insensitive style of asynchronous circuit design, complete with logical design examples. Future research directions are also identified.
Synthesis Of Mite Log-Domain Filters With Unique Operating Points, Shyam Subramanian, David Anderson, Paul Hasler, Bradley Minch
Synthesis Of Mite Log-Domain Filters With Unique Operating Points, Shyam Subramanian, David Anderson, Paul Hasler, Bradley Minch
Bradley Minch
Practical log-domain filter circuits might have multiple operating points in regions in which the translinear element does not obey the exponential law. In this paper, a method is proposed to implement any filter by a log-domain circuit that necessarily has a unique operating point. Any state-space description of the filter is shown to have an equivalent description that can be implemented by such a circuit. This methodology is applied to the synthesis of multiple-input translinear element (MITE) filters. As an example, shifted-companion-form (SCF) filters are synthesized. Further, it is proved that the resulting filters have a unique operating point.
A Physical Compact Model Of Dg Mosfet For Mixed-Signal Circuit Applications - Part I: Model Description, Gen Pei, Weiping Ni, Abhishek Kammula, Bradley Minch, Edwin Kan
A Physical Compact Model Of Dg Mosfet For Mixed-Signal Circuit Applications - Part I: Model Description, Gen Pei, Weiping Ni, Abhishek Kammula, Bradley Minch, Edwin Kan
Bradley Minch
To use double-gate (DG) MOSFET for mixed-signal circuit applications, especially for circuits in which the two gates are independently driven, such as in the case of dynamic-threshold and fixed-potential-plane operations, physical compact models that are valid for all modes of operations are necessary for accurate design and analysis. Employing physically rigorous current-voltage (I-V) relationship in subthreshold and above-threshold regions as asymptotic cases, we have constructed a model that joins the two operating regions by using carrier-screening functions. We have included consistently source/drain series resistance, low drain-field mobility, and small-geometry effects of drain-induced barrier lowering (DIBL), MOS interface mobility, velocity saturation …
Silicon Synaptic Adaptation Mechanisms For Homeostasis And Contrast Gain Control, Shih-Chii Liu, Bradley Minch
Silicon Synaptic Adaptation Mechanisms For Homeostasis And Contrast Gain Control, Shih-Chii Liu, Bradley Minch
Bradley Minch
We explore homeostasis in a silicon integrate-and-fire neuron. The neuron adapts its firing rate over time periods on the order of seconds or minutes so that it returns to its spontaneous firing rate after a sustained perturbation. Homeostasis is implemented via two schemes. One scheme looks at the presynaptic activity and adapts the synaptic weight depending on the presynaptic spiking rate. The second scheme adapts the synaptic"threshold" depending on the neuron's activity. The threshold is lowered if the neuron's activity decreases over a long time and is increased for prolonged increase in postsynaptic activity. The presynaptic adaptation mechanism models the …
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Bradley Minch
Independently driven double-gate MOSFETs (DGFETs) facilitate design of analog circuits under digital logic constraints and provide in-circuit parameter adaptability through threshold voltage control. Threshold voltagetuning is achieved by biasing one of the two gates where as strong coupling of surface potentials at the two interfaces provides a low resistance feedback path. The geometry also allows a back-floating gate NVRAM structure with superior scalability and floating gate related analog applications without any read disturbance. This paper gives examples across breadth of circuits where this tunability is exploited.
A Programmable Floating-Gate Bump Circuit With Variable Width, Sheng-Yu Peng, Bradley Minch, Paul Hasler
A Programmable Floating-Gate Bump Circuit With Variable Width, Sheng-Yu Peng, Bradley Minch, Paul Hasler
Bradley Minch
We propose a new programmable bump circuit using floating-gate transistors with a simple topology. The center and the width of this bump circuit are orthogonally tunable and programmable. The input signal range is rail to rail and the power consumption does not change dramatically while varying the width. Therefore, this circuit is suitable for low power applications. We use a vector-quantizer as an example to illustrate how this circuit fits into a large scale network.
Modeling All Spin Logic: Multi-Magnet Networks Interacting Via Spin Currents, Srikant Srinivasan
Modeling All Spin Logic: Multi-Magnet Networks Interacting Via Spin Currents, Srikant Srinivasan
Srikant Srinivasan
All-spin logic (ASL) represents a new approach to information processing where the roles of charges and capacitors in CMOS are played by spins and magnets. This paper (1) summarizes our earlier work on the input-output isolation and intrinsic directivity of ASL devices, (2) uses an experimentally benchmarked simulator for multimagnet networks coupled by spin transport channels to demonstrate a combinational NAND gate, and (3) describes the natural mapping of such ASL networks into neuromorphic circuits suitable for hybrid analog/digital information processing.
Unidirectional Information Transfer With Cascaded All Spin Logic Devices: A Ring Oscillator, Srikant Srinivasan
Unidirectional Information Transfer With Cascaded All Spin Logic Devices: A Ring Oscillator, Srikant Srinivasan
Srikant Srinivasan
The authors have presented the first simulator that simultaneously describes magnetization dynamics as well as spin transport in multi-magnet ASL networks and used it to demonstrate the possibility of large scale functional spin logic blocks through the example of an All Spin ring oscillator.
Activity-Aware Mental Stress Detection Using Physiological Sensors, Feng-Tso Sun, Cynthia Kuo, Heng-Tze Cheng, Senaka Buthpitiya, Patricia Collins, Martin Griss
Activity-Aware Mental Stress Detection Using Physiological Sensors, Feng-Tso Sun, Cynthia Kuo, Heng-Tze Cheng, Senaka Buthpitiya, Patricia Collins, Martin Griss
Martin L Griss
"Continuous stress monitoring may help users better understand their stress patterns and provide physicians with more reliable data for interventions. Previously, studies on mental stress detection were limited to a laboratory environment where participants generally rested in a sedentary position. However, it is impractical to exclude the effects of physical activity while developing a pervasive stress monitoring application for everyday use. The physiological responses caused by mental stress can be masked by variations due to physical activity. We present an activity-aware mental stress detection scheme. Electrocardiogram (ECG), galvanic skin response (GSR), and accelerometer data were gathered from 20 participants across …
Switching Energy-Delay Of All Spin Logic Devices, Srikant Srinivasan
Switching Energy-Delay Of All Spin Logic Devices, Srikant Srinivasan
Srikant Srinivasan
A recent proposal called all spin logic (ASL) proposes to store information in nanomagnets that communicate with spin currents in order to construct spin based digital circuits. We present a coupled magnetodynamics/spin-transport model for ASL devices that is based on established physics and is benchmarked against available experimental data. This model is used to show the linear dependence of switching energy and quadratic dependence of energy-delay of ASL devices on the number of Bohr magnetons comprising a nanomagnet. A scaling scheme that could lower the energy-delay of spin-torque switching while maintaining thermal stability is discussed.