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Hardware Security And Side Channel Power Analysis For 16x16 Booth Multiplier In 65nm Cmos Technology, Kanchan Vissamsetty
Hardware Security And Side Channel Power Analysis For 16x16 Booth Multiplier In 65nm Cmos Technology, Kanchan Vissamsetty
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As feature size is scaling down, dynamic power consumption reduces but static power consumption increases. Due to the increase of static power, leakage currents as a source, the information can be exploited successfully as a side-channel to recover the secrets of the cryptographic implementations. An attacker who has access to the hardware fabrication can insert a Trojan to the design to steal or alter information. In this thesis, a post-fab static voltage variation/detection technique is developed to detect the potential fabrication process Trojan insertion. The technique is, dividing the designed circuit into N equal segments, where each segment would have …