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Publications

1993

Computer Sciences

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Full-Text Articles in Physical Sciences and Mathematics

Measuring The Effects Of Thread Placement On The Kendall Square Ksr1, Amy Apon, T D. Wagner, E Smirni, M Madhukar, L W. Dowdy Aug 1993

Measuring The Effects Of Thread Placement On The Kendall Square Ksr1, Amy Apon, T D. Wagner, E Smirni, M Madhukar, L W. Dowdy

Publications

This paper describes a measurement study of the effects of thread placement on memory access times on the Kendall Square multiprocessor, the KSRl. The KSRl uses a conventional shared memory programming model in a distributed memory architecture. The architecture is based on a ring of rings of 64-bit superscalar microprocessors. The KSRl has a Cache-Only Memory Architecture (COMA). Memory consists of the local cache memoria attached to each processor. Whenever an address is accessed, the data item is automatically copied to the local cache memory module, 80 that access times for subsequent references will be minimal. If a local cache ...


The Ksr1: Experimentation And Modeling Of Poststore, Amy Apon, E Rosti, E Smirni, T D. Wagner, M Madhukar, L W. Dowdy Feb 1993

The Ksr1: Experimentation And Modeling Of Poststore, Amy Apon, E Rosti, E Smirni, T D. Wagner, M Madhukar, L W. Dowdy

Publications

Kendall Square Research introduced the KSRl system in 1991. The architecture is based on a ring of rings of 64bit microprocessors. It is a distributed, shared memory system and is scalable. The memory structure is unique and is the key to understanding the system. Different levels of caching eliminates physical memory addressing and leads to the ALLCACHE TM scheme. Since requested data may be found in any of several caches, the initial access time is variable. Once pulled into the local (sub)cache, subsequent access times are fixed and minimal. Thus, the KSRl is a Cache-Only Memory Architecture (COMA) system ...