Nanoscience and Nanotechnology Commons^™

Dynamic Through-Silicon Via Clustering In 3d Ic Floorplanning For Early Performance Optimization, Sucheta Mohapatra

Dissertations and Theses

Through-silicon via (TSV)-based three-dimensional integrated circuits (3D ICs) are expected to be the breakthrough technology for keeping up with the scaling trends of Moore's law, while also offering the unique opportunity for functional diversification through heterogenous integration. TSVs are vertical metal interconnects enabling communication across stacked and thinned dies. The dramatic reduction in global wirelength and chip footprint in 3DICs, directly improves delay, device density, bandwidth and routing congestion. Even with the current maturation of TSV process, the roadmap for industry adoption of 3DICs remains largely uncertain due to lack of standardized 3D tools capable of handling the sheer complexity …

Architectures And Algorithms For Intrinsic Computation With Memristive Devices, Jens Bürger

Dissertations and Theses

Neuromorphic engineering is the research field dedicated to the study and design of brain-inspired hardware and software tools. Recent advances in emerging nanoelectronics promote the implementation of synaptic connections based on memristive devices. Their non-volatile modifiable conductance was shown to exhibit the synaptic properties often used in connecting and training neural layers. With their nanoscale size and non-volatile memory property, they promise a next step in designing more area and energy efficient neuromorphic hardware.

My research deals with the challenges of harnessing memristive device properties that go beyond the behaviors utilized for synaptic weight storage. Based on devices that exhibit …

Complete Design Methodology Of A Massively Parallel And Pipelined Memristive Stateful Imply Logic Based Reconfigurable Architecture, Kamela Choudhury Rahman

Dissertations and Theses

Continued dimensional scaling of CMOS processes is approaching fundamental limits and therefore, alternate new devices and microarchitectures are explored to address the growing need of area scaling and performance gain. New nanotechnologies, such as memristors, emerge. Memristors can be used to perform stateful logic with nanowire crossbars, which allows for implementation of very large binary networks that can be easily reconfigured. This research involves the design of a memristor-based massively parallel datapath for various applications, specifically SIMD (Single Instruction Multiple Data) like architecture, and parallel pipelines. The dissertation develops a new model of massively parallel memristor-CMOS hybrid datapath architectures at …