VLSI and Circuits, Embedded and Hardware Systems Commons^™

Data And Network Optimization Effect On Web Performance, Steven Rosenberg, Surbhi Dangi, Isuru Warnakulasooriya

Surbhi Dangi

In this study, we measure the effects of two software approaches to improving data and network performance: 1. Content optimization and compression; and 2. Optimizing network protocols. We achieve content optimization and compression by means of BoostEdge by ActivNetworks and employ the SPDY network protocol by Google to lower the round trip time for HTTP transactions. Since the data and transport layers are separate, we conclude our investigation by studying the combined effect of these two techniques on web performance. Using document mean load time as the measure, we found that with and without packet loss, both BoostEdge and SPDY …

Arithmetic Logic Unit Architectures With Dynamically Defined Precision, Getao Liang

Doctoral Dissertations

Modern central processing units (CPUs) employ arithmetic logic units (ALUs) that support statically defined precisions, often adhering to industry standards. Although CPU manufacturers highly optimize their ALUs, industry standard precisions embody accuracy and performance compromises for general purpose deployment. Hence, optimizing ALU precision holds great potential for improving speed and energy efficiency. Previous research on multiple precision ALUs focused on predefined, static precisions. Little previous work addressed ALU architectures with customized, dynamically defined precision. This dissertation presents approaches for developing dynamic precision ALU architectures for both fixed-point and floating-point to enable better performance, energy efficiency, and numeric accuracy. These new …

A Small Acoustic Goniometer For General Purpose Research, Michael Pook

Boise State University Theses and Dissertations

Understanding acoustic events and monitoring their occurrence is a useful aspect of many research projects. In particular, acoustic goniometry allows researchers to determine the source of an event based solely on the sound it produces. The vast majority of the acoustic goniometry research projects used custom hardware targeted to the specific application under test. Unfortunately, due to the wide range of sensing applications, a flexible general purpose hardware/firmware system does not exist for this research. This dissertation focuses on the development of such a system which encourages the continued exploration of general purpose hardware/firmware and lowers barriers to research in …

Dividing And Conquering Meshes Within The Nist Fire Dynamics Simulator (Fds) On Multicore Computing Systems, Donald Charles Collins

Masters Theses

The National Institute for Standards and Technology (NIST) Fire Dynamics Simulator (FDS) provides a computational fluid dynamics model of a fire, which can be visualized by using NIST Smokeview (SMV). Users must create a configuration file (*.fds) that describes the environment and other characteristics of the fire scene so that the FDS software can produce the output file (*.smv) needed for visualization.The processing can be computationally intensive, often taking between several minutes and several hours to complete. In many cases, a user will create a file that is not optimized for a multicore computing system. By dividing meshes within the …

High Temperature Silicon Carbide Mixed-Signal Circuits For Integrated Control And Data Acquisition, Ashfaqur Rahman

Graduate Theses and Dissertations

Wide bandgap semiconductor materials such as gallium nitride (GaN) and silicon carbide have grown in popularity as a substrate for power devices for high temperature and high voltage applications over the last two decades. Recent research has been focused on the design of integrated circuits for protection and control in these wide bandgap materials. The ICs developed in SiC and GaN can not only complement the power devices in high voltage and high frequency applications, but can also be used for standalone high temperature control and data acquisition circuitry.

This dissertation work aims to explore the possibilities in high temperature …

Skybridge: A New Nanoscale 3-D Computing Framework For Future Integrated Circuits, Mostafizur Rahman

Doctoral Dissertations

Continuous scaling of CMOS has been the major catalyst in miniaturization of integrated circuits (ICs) and crucial for global socio-economic progress. However, continuing the traditional way of scaling to sub-20nm technologies is proving to be very difficult as MOSFETs are reaching their fundamental performance limits [1] and interconnection bottleneck is dominating IC operational power and performance [2]. Migrating to 3-D, as a way to advance scaling, has been elusive due to inherent customization and manufacturing requirements in CMOS architecture that are incompatible with 3-D organization. Partial attempts with die-die [3] and layer-layer [4] stacking have their own limitations [5]. We …

Securing Network Processors With Hardware Monitors, Kekai Hu

Doctoral Dissertations

As an essential part of modern society, the Internet has fundamentally changed our lives during the last decade. Novel applications and technologies, such as online shopping, social networking, cloud computing, mobile networking, etc, have sprung up at an astonishing pace. These technologies not only influence modern life styles but also impact Internet infrastructure. Numerous new network applications and services require better programmability and flexibility for network devices, such as routers and switches. Since traditional fixed function network routers based on application specific integrated circuits (ASICs) have difficulty keeping pace with the growing demands of next-generation Internet applications, there is an …

Physically Equivalent Intelligent Systems For Reasoning Under Uncertainty At Nanoscale, Santosh Khasanvis

Doctoral Dissertations

Machines today lack the inherent ability to reason and make decisions, or operate in the presence of uncertainty. Machine-learning methods such as Bayesian Networks (BNs) are widely acknowledged for their ability to uncover relationships and generate causal models for complex interactions. However, their massive computational requirement, when implemented on conventional computers, hinders their usefulness in many critical problem areas e.g., genetic basis of diseases, macro finance, text classification, environment monitoring, etc. We propose a new non-von Neumann technology framework purposefully architected across all layers for solving these problems efficiently through physical equivalence, enabled by emerging nanotechnology. The architecture builds …

Threat Analysis, Countermeaures And Design Strategies For Secure Computation In Nanometer Cmos Regime, Raghavan Kumar

Doctoral Dissertations

Advancements in CMOS technologies have led to an era of Internet Of Things (IOT), where the devices have the ability to communicate with each other apart from their computational power. As more and more sensitive data is processed by embedded devices, the trend towards lightweight and efficient cryptographic primitives has gained significant momentum. Achieving a perfect security in silicon is extremely difficult, as the traditional cryptographic implementations are vulnerable to various active and passive attacks. There is also a threat in the form of "hardware Trojans" inserted into the supply chain by the untrusted third-party manufacturers for economic incentives. Apart …

An Investigation Into Partitioning Algorithms For Automatic Heterogeneous Compilers, Antonio M. Leija

Master's Theses

Automatic Heterogeneous Compilers allows blended hardware-software solutions to be explored without the cost of a full-fledged design team, but limited research exists on current partitioning algorithms responsible for separating hardware and software. The purpose of this thesis is to implement various partitioning algorithms onto the same automatic heterogeneous compiler platform to create an apples to apples comparison for AHC partitioning algorithms. Both estimated outcomes and actual outcomes for the solutions generated are studied and scored. The platform used to implement the algorithms is Cal Poly’s own Twill compiler, created by Doug Gallatin last year. Twill’s original partitioning algorithm is chosen …

A 3rd Generation Frequency Disturbance Recorder: A Secure, Low Cost Synchophasor Measurement Device, Jerel Alan Culliss

Doctoral Dissertations

The Frequency Monitoring Network (FNET) is a wide-area phasor measurement system developed in 2003. It collects power system data using embedded devices known as Frequency Disturbance Recorders (FDRs) which are installed at distribution level voltages. These devices are single-phase synchrophasor measurement units which share a number of common attributes with their commercial counterparts.

Phasor measurements from FDRs across North America and other power grids around the world are transmitted over the Internet back to the FNET servers at the University of Tennessee. By analyzing the fluctuations in the grid’s frequency, FNET can identify disruptive events relating to the operation of …

A Low-Power Bfsk/Ook Transmitter For Wireless Sensors, Mohammed Shahriar Jahan

Doctoral Dissertations

In recent years, significant improvements in semiconductor technology have allowed consistent development of wireless chipsets in terms of functionality and form factor. This has opened up a broad range of applications for implantable wireless sensors and telemetry devices in multiple categories, such as military, industrial, and medical uses. The nature of these applications often requires the wireless sensors to be low-weight and energy-efficient to achieve long battery life. Among the various functions of these sensors, the communication block, used to transmit the gathered data, is typically the most power-hungry block. In typical wireless sensor networks, transmission range is below 10 …

Danna A Neuromorphic Computing Vlsi Chip, Christopher Paul Daffron

Masters Theses

Dynamic Adaptive Neural Network Arrays (DANNAs) are neuromorphic systems that exhibit spiking behaviors and can be designed using evolutionary optimization. Array elements are rapidly reconfigurable and can function as either neurons or synapses with programmable interconnections and parameters. Currently, DANNAs are implemented using a Field Programmable Gate Array (FPGA) and are constrained by this technology. To alleviate these constraints and introduce new and improved features, a semi-custom Very Large Scale Integration (VLSI) implementation has been created. This implementation improves upon the FPGA implementation in three key areas. The density of the array is improved, with 5,625 elements on a single …

Function Verification Of Combinational Arithmetic Circuits, Duo Liu

Masters Theses

Hardware design verification is the most challenging part in overall hardware design process. It is because design size and complexity are growing very fast while the requirement for performance is ever higher. Conventional simulation-based verification method cannot keep up with the rapid increase in the design size, since it is impossible to exhaustively test all input vectors of a complex design. An important part of hardware verification is combinational arithmetic circuit verification. It draws a lot of attention because flattening the design into bit-level, known as the bit-blasting problem, hinders the efficiency of many current formal techniques. The goal of …

Design & Development Of Fpga Based Vme Bus Controller, Himali Patel, Poornima Talwai

Innovative Research Publications IRP India

The VME bus interface Controller (VIC068A) is used to interface Local CPU bus and VME bus. VME Bus Controller is used in wide application areas where high reliability, good accuracy and high speed are desired to withstand industrial environment like nuclear power plant and process industries. VME Bus controller can configure as Master, Slave, Interrupt Handler, arbiter as well as power monitor. Commercial VME Bus interface controller chips are available from a few vendors and are very expensive. As time goes VME Bus Controller Chips become absolute and vendor support will not be provided. To solve part obsolescence problem and …

Sram Compiler For Automated Memory Layout Supporting Multiple Transistor Process Technologies, Brandon Hilgers

Master's Theses

This research details the design of an SRAM compiler for quickly creating SRAM blocks for Cal Poly integrated circuit (IC) designs. The compiler generates memory for two process technologies (IBM 180nm cmrf7sf and ON Semiconductor 600nm SCMOS) and requires a minimum number of specifications from the user for ease of use, while still offering the option to customize the performance for speed or area of the generated SRAM cell. By automatically creating SRAM arrays, the compiler saves the user time from having to layout and test memory and allows for quick updates and changes to a design. Memory compilers with …

Hardware Implementations For Symmetric Key Cryptosystems, Hayssam El-Razouk

Electronic Thesis and Dissertation Repository

The utilization of global communications network for supporting new electronic applications is growing. Many applications provided over the global communications network involve exchange of security-sensitive information between different entities. Often, communicating entities are located at different locations around the globe. This demands deployment of certain mechanisms for providing secure communications channels between these entities. For this purpose, cryptographic algorithms are used by many of today's electronic applications to maintain security. Cryptographic algorithms provide set of primitives for achieving different security goals such as: confidentiality, data integrity, authenticity, and non-repudiation. In general, two main categories of cryptographic algorithms can be used …

Solar Decathlon Instrumentation And Controls, Timothy Ambrose, Mateo Begue, Andrew Elliott

Mechanical Engineering

The Instrumentation and Controls team has designed a control and instrumentation system for the 2015 Cal Poly Solar Decathlon house that will monitor temperature, humidity, and energy usage throughout the house and control the phase change material duct. It will relay information to the user through a tablet application developed by the Computer Science team. The team has also designed a lighting control scheme for use with Lutron’s HomeWorks QS lighting control system.

Sun-Tracking Solar-Powered Led Street Light, Wesley Ballar, Harrison Wong

Electrical Engineering

Street lighting is an essential utility especially in urban and industrialized areas because it provides illumination and safety for vehicles and pedestrians throughout the night. However, street lights are relatively inefficient; they consume large amounts of power from electrical grids and have predetermined operation times that are often non-optimal for the surrounding environment. The Sun-Tracking Solar-Powered LED Street Lamp is a self-sustaining device, built to replace the current lighting sources. The device features sun-tracking capabilities for maximum energy gathering and darkness recognition to establish optimal operation times. The project provides a reliable and enhanced alternative to current street lighting systems.

Phase Locked Loop Integrated Circuit, Scott Buchanan, Jonathan Bonello

Electrical Engineering

No abstract provided.

Current Protection For The Energy Harvesting From Exercise Machines (Ehfem) Project, Colton Crivelli

Electrical Engineering

The Energy Harvesting from Exercise Machines (EHFEM) project intends to create an exercise machine that recycles the energy expended by an athlete operating the machine by sending it to the electric grid. The work done by the user goes through a DC-DC converter and an inverter in order to prepare it for delivery to the grid. A protection circuit ensures that the inverter does not try to pull too much current from the DC-DC converter. The project implements a current protection system that ensures the system doesn’t experience an overcurrent condition.

Chipper: Capacitive Bed Occupancy Sensing For An Intelligent Alarm Clock, David Levi

Electrical Engineering

What if your alarm clock knew when you got out—and stayed out—of bed? Current alarm clocks happily let you go back to bed after turning them off. In this project, I build an alarm which only stops ringing when you get out bed, and starts ringing again if you lie back in bed.

This project uses capacitance to detect bed occupancy. A person on or near the bed creates a tiny, picofarads level increase in capacitance, as seen by a sensor placed under the mattress. A microprocessor interprets this signal, and also drives an audio alarm. Shielding of the sensor …

Dual Channel Matrix Switch Audio Receiver, Austin Fox

Electrical Engineering

The Dual Channel Matrix Switch Audio Receiver controls 2 separate audio output channels. Each channel plays any of the system's 3 inputs. This controller enables a user to play two separate audio signals through two separate speaker channels. The system design allows audio input from 2 RCA sources or 1 RCA source and a phono source. The system outputs an audio signal for each output simultaneously at up to 36W on each channel for an 8Ω load. The device allows a user to control the audio input and the volume of each output channel. An Arduino Uno R3 microcontroller interfaced …

Wd Data Aquisition Board, Charmaine Guintu

Electrical Engineering

The Data Acquisition (DAQ) Board project is a continuation of a project that started last year. It is a project in collaboration with Western Digital. Western Digital (WD) Power LSI Systems Validation group has stress testing equipment called the Torture Stand. Inside the Torture Stand hard drives are compacted and tested until failure. However, the transient responses of voltage and current signals from the hard drives are currently obtained from oscilloscopes. The oscilloscopes are bulky and expensive, so to replace the oscilloscopes the DAQ was created. The small size and much cheaper cost of the DAQ allows Western Digital to …

Design And Fabrication Techniques Of Devices For Embedded Power Active Contact Lens, Errol Heradio Leon

Master's Theses

This thesis designed and fabricated various devices that were interfaced to an IC for an active contact lens that notifies the user of an event by detection of an external wireless signal. The contact lens consisted of an embedded antenna providing communication with a 2.4GHz system, as well as inductive charging at an operating frequency of 13.56 MHz. The lens utilized a CBC005 5µAh thin film battery by Cymbet and a manufactured graphene super capacitor as a power source. The custom integrated circuit (IC) was designed using the On Semiconductor CMOS C5 0.6 µm process to manage …

Analysis Of Mos Current Mode Logic (Mcml) And Implementation Of Mcml Standard Cell Library For Low-Noise Digital Circuit Design, Marcus Edwin Allan Heim

Master's Theses

MOS current mode logic (MCML) offers low noise digital circuits that reduce noise that can cripple analog components in mixed-signal integrated circuits, when compared to CMOS digital circuits. An MCML standard cell library was developed for the Cadence Virtuoso Integrated Circuit (IC) design software that gives IC designers the ability to design complex, low noise digital circuits for use in mixed-signal and noise sensitive systems at a high level of abstraction, allowing them to get superior products to market faster than competitors. The MCML standard cell library developed and presented here allows for fast development of mixed signal circuits by …

Unmanned Aircraft Systems: Air-Ground Channel Characterization For Future Applications, David W. Matolak, Ruoyu Sun

Faculty Publications

Unmanned aircraft systems (UASs) are being used increasingly worldwide. These systems will operate in conditions that differ from conventional piloted aircraft, and this implies that the airground (AG) channel for UASs can differ significantly from the traditional, simple, AG channel models. After providing some background and motivation, we describe the AG channel features and our efforts in measuring and modeling the AG channel. Some example measurement and model results-for the path loss and the Ricean K-factor-are provided to illustrate some of the interesting AG channel characteristics that are still being investigated.

Intrinsic Physical Layer Authentication Of Integrated Circuits, William E. Cobb, Michael A. Temple, Rusty O. Baldwin, Eric W. Garcia, Eric D. Lapse

AFIT Patents

A system and method of generating and comparing a fingerprint for an integrated circuit is provided. A sensor module captures electromagnetic emissions from the integrated circuit. A feature extraction module extracts discriminating features from the captured electromagnetic emissions. A classifier training module generates a plurality of authentication fingerprints of the integrated circuit from the extracted discriminating features creating a reference fingerprint template for the integrated circuit. The reference template for the integrated circuit is stored in a database. For authentication, the reference fingerprint template from the database is compared to the generated authentication fingerprint.

Implementation Of Natural Switching Surface Control For A Flyback Converter, Ethan Storm Williams

Electrical Engineering Undergraduate Honors Theses

The flyback converter is an extremely common topology used for DC/DC power conversion. Widely used methods to control the flyback converter include voltage mode and current mode controllers. More recently, sliding mode control has been developed for the flyback converter. While these control methods may be considered adequate, the Natural Switching Surface (NSS) sliding mode control method detailed in this thesis presents a more robust controller. NSS control eliminates the effects presented from variations in components and design as well as minimizes the effects from external disturbances. This thesis steps through the complete design and implementation process of a NSS …

High Temperature Cmos Silicon Carbide Asynchronous Circuit Design, Landon John Caley

Graduate Theses and Dissertations

Designing a digital circuit to operate in an extreme temperature range is a challenge with increasing demand for a solution. Large variations in temperature have a distinct impact on electron mobilities causing substantial changes to the threshold voltage of the devices. These physical changes affect the setup and hold times of clocked components, such as D-Flip Flops, of a traditional synchronous digital circuit. Focusing primarily on high temperature circuit operation, this dissertation presents a digital circuit design methodology pairing an asynchronous circuit design paradigm called NULL Convention Logic (NCL) as well as traditional Boolean circuitry with a wide-bandgap semiconductor material, …