Computer Engineering Commons^™

Power Efficient High Temperature Asynchronous Microcontroller Design, Nathan William Kuhns

Graduate Theses and Dissertations

There is an increasing demand for dependable and efficient digital circuitry capable of operating in high temperature environments. Extreme temperatures have adverse effects on traditional silicon synchronous systems because of the changes in delay and setup and hold times caused by the variances in each device’s threshold voltage. This dissertation focuses on the design of the major functionality of an asynchronous 8051 microcontroller in Raytheon’s high temperature Silicon Carbide process, rated for operation over 300ºC. The microcontroller is designed in NULL Convention Logic, for which the traditional bus architecture used for data transfer would consume a large amount of power. …

A Hybrid Partially Reconfigurable Overlay Supporting Just-In-Time Assembly Of Custom Accelerators On Fpgas, Zeyad Tariq Aklah

Graduate Theses and Dissertations

The state of the art in design and development flows for FPGAs are not sufficiently mature to allow programmers to implement their applications through traditional software development flows. The stipulation of synthesis as well as the requirement of background knowledge on the FPGAs' low-level physical hardware structure are major challenges that prevent programmers from using FPGAs. The reconfigurable computing community is seeking solutions to raise the level of design abstraction at which programmers must operate, and move the synthesis process out of the programmers' path through the use of overlays. A recent approach, Just-In-Time Assembly (JITA), was proposed that enables …

Just In Time Assembly (Jita) - A Run Time Interpretation Approach For Achieving Productivity Of Creating Custom Accelerators In Fpgas, Sen Ma

Graduate Theses and Dissertations

The reconfigurable computing community has yet to be successful in allowing programmers to access FPGAs through traditional software development flows. Existing barriers that prevent programmers from using FPGAs include: 1) knowledge of hardware programming models, 2) the need to work within the vendor specific CAD tools and hardware synthesis. This thesis presents a series of published papers that explore different aspects of a new approach being developed to remove the barriers and enable programmers to compile accelerators on next generation reconfigurable manycore architectures. The approach is entitled Just In Time Assembly (JITA) of hardware accelerators. The approach has been defined …

Asynchronous Data Processing Platforms For Energy Efficiency, Performance, And Scalability, Liang Men

Graduate Theses and Dissertations

The global technology revolution is changing the integrated circuit industry from the one driven by performance to the one driven by energy, scalability and more-balanced design goals. Without clock-related issues, asynchronous circuits enable further design tradeoffs and in operation adaptive adjustments for energy efficiency. This dissertation work presents the design methodology of the asynchronous circuit using NULL Convention Logic (NCL) and multi-threshold CMOS techniques for energy efficiency and throughput optimization in digital signal processing circuits. Parallel homogeneous and heterogeneous platforms implementing adaptive dynamic voltage scaling (DVS) based on the observation of system fullness and workload prediction are developed for balanced …

Hardware Trojan Detection Via Golden Reference Library Matching, Lucas Weaver

Graduate Theses and Dissertations

Due to the proliferation of hardware Trojans in third party Intellectual Property (IP) designs, the issue of hardware security has risen to the forefront of computer engineering. Because of the miniscule size yet devastating effects of hardware Trojans, few detection methods have been presented that adequately address this problem facing the hardware industry. One such method with the ability to detect hardware Trojans is Structural Checking. This methodology analyzes a soft IP at the register-transfer level to discover malicious inclusions. An extension of this methodology is presented that expands the list of signal functionalities, termed assets, in addition to introducing …

Achieving A Better Balance Between Productivity And Performance On Fpgas Through Heterogeneous Extensible Multiprocessor Systems, Abazar Sadeghian

Graduate Theses and Dissertations

Field Programmable Gate Arrays (FPGAs) were first introduced circa 1980, and they held the promise of delivering performance levels associated with customized circuits, but with productivity levels more closely associated with software development. Achieving both performance and productivity objectives has been a long standing challenge problem for the reconfigurable computing community and remains unsolved today. On one hand, Vendor supplied design flows have tended towards achieving the high levels of performance through gate level customization, but at the cost of very low productivity. On the other hand, FPGA densities are following Moore's law and and can now support complete multiprocessor …

Automatic User Profile Construction For A Personalized News Recommender System Using Twitter, Shiva Theja Reddy Gopidi

Graduate Theses and Dissertations

Modern society has now grown accustomed to reading online or digital news. However, the huge corpus of information available online poses a challenge to users when trying to find relevant articles. A hybrid system “Personalized News Recommender Using Twitter’ has been developed to recommend articles to a user based on the popularity of the articles and also the profile of the user. The hybrid system is a fusion of a collaborative recommender system developed using tweets from the “Twitter” public timeline and a content recommender system based the user’s past interests summarized in their conceptual user profile. In previous work, …

Reducing Multiple Access Interference In Broadband Multi-User Wireless Networks, Ali Nayef Alqatawneh

Graduate Theses and Dissertations

This dissertation is devoted to developing multiple access interference (MAI) reduction techniques for multi-carrier multi-user wireless communication networks.

In multi-carrier code division multiple access (MC-CDMA) systems, a full multipath diversity can be achieved by transmitting one symbol over multiple orthogonal subcarriers by means of spreading codes. However, in frequency selective fading channels, orthogonality among users can be destroyed leading to MAI. MAI represents the main obstacle to support large number of users in multi-user wireless systems. Consequently, MAI reduction becomes a main challenge when designing multi-carrier multi-user wireless networks. In this dissertation, first, we study MC-CDMA systems with different existing …

Adaptive Controller Using Runtime Partial Hardware Reconfiguration For Unmanned Aerial Vehicles (Uavs), Nikhil Thomas

Graduate Theses and Dissertations

The goal of this thesis is to explore the feasibility of a multirotor controller system which can dynamically change the arm configuration of a multirotor. Currently most of the multirotor systems have to be powered down, rewired, and programmed with new firmware, to configure how many arms/motors they use to fly. The focus of our effort is to develop a Field Programmable Gate Array (FPGA) based hardware/software controller which uses dynamic partial hardware reconfiguration to switch the arm/motor configuration of a multirotor during operation. We believe that this will make a multirotor more fault tolerant and adaptive. This thesis explains …

Data Integrity Verification In Cloud Computing, Katanosh Morovat

Graduate Theses and Dissertations

Cloud computing is an architecture model which provides computing and storage capacity as a service over the internet. Cloud computing should provide secure services for users and owners of data as well. Cloud computing services are a completely internet-based technology where data are stored and maintained in the data center of a cloud provider. Lack of appropriate control over the data might incur several security issues. As a result, some data stored in the cloud must be protected at all times. These types of data are called sensitive data. Sensitive data is defined as data that must be protected against …

Designing Customizable Network-On-Chip With Support For Embedded Private Memory For Multi-Processor System-On-Chips, Azad Fakhari

Graduate Theses and Dissertations

The computer industry's transition to multiprocessor systems on chip (MPSoC) architectures is increasing the need for new scalable high-bandwidth on-chip communication

backbones. Network-on-Chip (NoC) interconnects are gaining interest for serving as the on-chip communication infrastructure. The most important issues to be considered in designing a NoC are topology, routing algorithm, flow control, and buffering and also the trade-offs between performance, power, and area.

This research proposes a custom-designed NoC specifically for MPSoCs on FPGAs. The proposed design allows the communication infrastructure to seamlessly scale as the numbers of processors within the chip increases. The design adds a new level of …

Attitudes And Behaviors In Online Communities: Empirical Studies Of The Effects Of Social, Community, And Individual Characteristics, Richard Kumi

Graduate Theses and Dissertations

Online communities and communities of practice bring people together to promote and support shared goals and exchange information. Personal interactions are important to many of these communities and one of the important outcomes of personal interactions in online communities and communities of practice is user-generated content. The three essays in the current study examines behavior motivation in online communities and communities of practice to understand how Social and personal psychological factors, and user-generated influence attitudes, intentions and behaviors in online communities.

The first essay addresses two research questions. First, how does Social capital influence exchange and combination behaviors in online …

Identifying Emerging Researchers Using Social Network Analysis, Syed Masum Billah

Graduate Theses and Dissertations

Finding rising stars in academia early in their careers has many implications when hiring new faculty, applying for promotion, and/or requesting grants. Typically, the impact and productivity of a researcher are assessed by a popular measurement called the h-index that grows linearly with the academic age of a researcher. Therefore, h-indices of researchers in the early stages of their careers are almost uniformly low, making it difficult to identify those who will, in future, emerge as influential leaders in their field. To overcome this problem, we make use of Social network analysis to identify young researchers most likely to become …

An Open Source, Line Rate Datagram Protocol Facilitating Message Resiliency Over An Imperfect Channel, Christina Marie Smith

Graduate Theses and Dissertations

Remote Direct Memory Access (RDMA) is the transfer of data into buffers between two compute nodes that does not require the involvement of a CPU or Operating System (OS). The idea is borrowed from Direct Memory Access (DMA) which allows memory within a compute node to be transferred without transiting through the CPU. RDMA is termed a zero-copy protocol as it eliminates the need to copy data between buffers within the protocol stack. Because of this and other features, RDMA promotes reliable, high throughput and low latency transfer for packet-switched networking. While the benefits of RMDA are well known and …

Analysis Of Social Networks In A Virtual World, Gregory Thomas Stafford

Graduate Theses and Dissertations

As three-dimensional virtual environments become both more prevalent and more fragmented, studying how users are connected via their avatars and how they benefit from the virtual world community has become a significant area of research. An in-depth analysis of virtual world Social networks is needed to evaluate how users interact in virtual worlds, to better understand the impact of avatar Social networks on the virtual worlds, and to improve future online Social networks.

Our current efforts are focused on building and exploring the Social network aspects of virtual worlds. In this thesis, we build a Social network of avatars based …

Analysis Of Parameter Tuning On Energy Efficiency In Asynchronous Circuits, Justin Thomas Roark

Graduate Theses and Dissertations

Power and energy consumption are the primary concern of the digital integrated circuit (IC) industry. Asynchronous logic, in the past several years, has increased in popularity due to its low power nature. This thesis analyzes a collection of array multipliers with different parameters to compare two asynchronous design paradigms, NULL Convention Logic (NCL) and Multi-Threshold NULL Convention Logic (MTNCL). Several commercially available pieces of software and custom scripts are used to analyze the asynchronous circuits and their components to provide the energy consumption estimation on various parts of each circuit. The analysis of the software results revealed that MTNCL circuits …

Cad Tool Design For Ncl And Mtncl Asynchronous Circuits, Vijay Mani Pillai

Graduate Theses and Dissertations

This thesis presents an implementation of a method developed to readily convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty compared to the all low-Vt implementation, and has negligible area overhead. The proposed tool utilizes industry-standard CAD tools. This research also presents an Automated Gate-Level Pipelining with Bit-Wise Completion (AGLPBW) method to maximize throughput of delay-insensitive full-word pipelined NCL circuits. These methods have been integrated into the Mentor Graphics and …

Cad Tools For Synthesis Of Sleep Convention Logic, Parviz Palangpour

Graduate Theses and Dissertations

This dissertation proposes an automated flow for the Sleep Convention Logic (SCL) asynchronous design style. The proposed flow synthesizes synchronous RTL into an SCL netlist. The flow utilizes commercial design tools, while supplementing missing functionality using custom tools. A method for determining the performance bottleneck in an SCL design is proposed. A constraint-driven method to increase the performance of linear SCL pipelines is proposed. Several enhancements to SCL are proposed, including techniques to reduce the number of registers and total sleep capacitance in an SCL design.

Gesture Based Home Automation For The Physically Disabled, Alexander Hugh Nelson

Graduate Theses and Dissertations

Paralysis and motor-impairments can greatly reduce the autonomy and quality of life of a patient while presenting a major recurring cost in home-healthcare. Augmented with a non-invasive wearable sensor system and home-automation equipment, the patient can regain a level of autonomy at a fraction of the cost of home nurses. A system which utilizes sensor fusion, low-power digital components, and smartphone cellular capabilities can extend the usefulness of such a system to allow greater adaptivity for patients with various needs. This thesis develops such a system as a Bluetooth enabled glove device which communicates with a remote web server to …

Extending The Hybridthread Smp Model For Distributed Memory Systems, Eugene Anthony Cartwright Iii

Graduate Theses and Dissertations

Memory Hierarchy is of growing importance in system design today. As Moore's Law allows system designers to include more processors within their designs, data locality becomes a priority. Traditional multiprocessor systems on chip (MPSoC) experience difficulty scaling as the quantity of processors increases. This challenge is common behavior of memory accesses in a shared memory environment and causes a decrease in memory bandwidth as processor numbers increase. In order to provide the necessary levels of scalability, the computer architecture community has sought to decentralize memory accesses by distributing memory throughout the system. Distributed memory offers greater bandwidth due to decoupled …

Location-Aware Traffic Management On Mobile Phones, Sarath Krishna Mandava

Graduate Theses and Dissertations

The growing number of mobile phone users is a primary cause of congestion in cellular networks. Therefore, cellular network providers have turned to expensive and differentiated data plans. Unfortunately, as the number of smartphone users keeps increasing, changing data plans only provides a temporary solution. A more permanent solution is offloading 3G traffic to networks in orthogonal frequency bands. One such plausible network is open Wi-Fi, which is free by definition. As Wi-Fi networks become ubiquitous, there are several areas where there is simultaneous Wi-Fi and 3G coverage. In this thesis, we study the feasibility of offloading 3G traffic to …

Application Of The Empirical Mode Decomposition On The Characterization And Forecasting Of The Arrival Data Of An Enterprise Cluster, Linh Bao Ngo

Graduate Theses and Dissertations

Characterization and forecasting are two important processes in capacity planning. While they are closely related, their approaches have been different. In this research, a decomposition method called Empirical Mode Decomposition (EMD) has been applied as a preprocessing tool in order to bridge the input of both characterization and forecasting processes of the job arrivals of an enterprise cluster. Based on the facts that an enterprise cluster follows a standard preset working schedule and that EMD has the capability to extract hidden patterns within a data stream, we have developed a set of procedures that can preprocess the data for characterization …

File System Simulation: Hierarchical Performance Measurement And Modeling, Hai Quang Nguyen

Graduate Theses and Dissertations

File systems are very important components in a computer system. File system simulation can help to predict the performance of new system designs. It offers the advantages of the flexibility of modeling and the cost and time savings of utilizing simulation instead of full implementation. Being able to predict end-to-end file system performance against a pre-defined workload can help system designers to make decisions that could affect their entire product line, involving several million dollars of investment. This dissertation presents detailed simulation-based performance models of the Linux ext3 file system and the PVFS parallel file system. The models are developed …