Computer Engineering Commons^™

Energy And Performance Balancing Architecture For Asynchronous Data Processing Platforms, Chien-Wei Lo

Graduate Theses and Dissertations

The semiconductor industry has been increasingly focused on the energy consumption and heat generation in CMOS-based integrated circuits (ICs) for its dominating impact on the system performance and reliability. Without clock-related timing constraints, asynchronous circuits have demonstrated unique flexibility in performance-energy tradeoffs compared to synchronous designs. This dissertation work presents the architecture capable of balancing energy and performance for asynchronous digital signal processing circuits using the Multi-Threshold NULL Convention Logic (MTNCL). Architecture implementing user-configurable adaptive dynamic voltage scaling (DVS) and data processing core disabling based on the detection and parameterization of system throughput are developed for MTNCL parallel homogeneous and …

Operating System Identification By Ipv6 Communication Using Machine Learning Ensembles, Adrian Ordorica

Graduate Theses and Dissertations

Operating system (OS) identification tools, sometimes called fingerprinting tools, are essential for the reconnaissance phase of penetration testing. While OS identification is traditionally performed by passive or active tools that use fingerprint databases, very little work has focused on using machine learning techniques. Moreover, significantly more work has focused on IPv4 than IPv6. We introduce a collaborative neural network ensemble that uses a unique voting system and a random forest ensemble to deliver accurate predictions. This approach uses IPv6 features as well as packet metadata features for OS identification. Our experiment shows that our approach is valid and we achieve …

Introduction To Signal Timing & Traffic Control, Sarah V. Hernandez, Mariah Crew, Karla Diaz-Corro, Taslima Akter

Civil Engineering Teaching and Learning

The purpose of these lesson plans is to introduce students to traffic signalization basics. Students will be lead through a series of mini-lectures on traffic control and signalization including a discussion on the limitations and benefits of traffic signalization. The lesson plans compliment a computer simulation “game” in which students act as manual operators for a single up to four by four gridded intersection. Students attempt to control the progression of signals to understand the relationship between signal timing and user delay. Through experimentation with the simulation, students generate a presentation discussing the benefits and drawbacks of signal timing and …

A Study Of Activation Functions For Neural Networks, Meenakshi Manavazhahan

Computer Science and Computer Engineering Undergraduate Honors Theses

Artificial neural networks are function-approximating models that can improve themselves with experience. In order to work effectively, they rely on a nonlinearity, or activation function, to transform the values between each layer. One question that remains unanswered is, “Which non-linearity is optimal for learning with a particular dataset?” This thesis seeks to answer this question with the MNIST dataset, a popular dataset of handwritten digits, and vowel dataset, a dataset of vowel sounds. In order to answer this question effectively, it must simultaneously determine near-optimal values for several other meta-parameters, including the network topology, the optimization algorithm, and the number …

Improving Automatic Content Type Identification From A Data Set, Kathy T. Dai

Computer Science and Computer Engineering Undergraduate Honors Theses

Data file layout inference refers to building the structure and determining the metadata of a text file. The text files dealt within this research are personal information records that have a consistent structure. Traditionally, if the layout structure of a text file is unknown, the human user must undergo manual labor of identifying the metadata. This is inefficient and prone to error. Content-based oracles are the current state-of-the-art automation technology that attempts to solve the layout inference problem by using databases of known metadata. This paper builds upon the information and documentation of the content-based oracles, and improves the databases …

Project Pradio, Trigg T. La Tour

Computer Science and Computer Engineering Undergraduate Honors Theses

This paper examines the design and manufacturing of a device that allows two or more users to share a wireless audio stream. Effectively, this allows a group of people to listen to the same audio in a synchronized manner. The product was unable to be completed in the allotted time. Regardless, significant progress was made and valuable insight into the circuit board design process was gained.

Music Feature Matching Using Computer Vision Algorithms, Mason Hollis

Computer Science and Computer Engineering Undergraduate Honors Theses

This paper seeks to establish the validity and potential benefits of using existing computer vision techniques on audio samples rather than traditional images in order to consistently and accurately identify a song of origin from a short audio clip of potentially noisy sound. To do this, the audio sample is first converted to a spectrogram image, which is used to generate SURF features. These features are compared against a database of features, which have been previously generated in a similar fashion, in order to find the best match. This algorithm has been implemented in a system that can run as …

Power Efficient High Temperature Asynchronous Microcontroller Design, Nathan William Kuhns

Graduate Theses and Dissertations

There is an increasing demand for dependable and efficient digital circuitry capable of operating in high temperature environments. Extreme temperatures have adverse effects on traditional silicon synchronous systems because of the changes in delay and setup and hold times caused by the variances in each device’s threshold voltage. This dissertation focuses on the design of the major functionality of an asynchronous 8051 microcontroller in Raytheon’s high temperature Silicon Carbide process, rated for operation over 300ºC. The microcontroller is designed in NULL Convention Logic, for which the traditional bus architecture used for data transfer would consume a large amount of power. …

A Hybrid Partially Reconfigurable Overlay Supporting Just-In-Time Assembly Of Custom Accelerators On Fpgas, Zeyad Tariq Aklah

Graduate Theses and Dissertations

The state of the art in design and development flows for FPGAs are not sufficiently mature to allow programmers to implement their applications through traditional software development flows. The stipulation of synthesis as well as the requirement of background knowledge on the FPGAs' low-level physical hardware structure are major challenges that prevent programmers from using FPGAs. The reconfigurable computing community is seeking solutions to raise the level of design abstraction at which programmers must operate, and move the synthesis process out of the programmers' path through the use of overlays. A recent approach, Just-In-Time Assembly (JITA), was proposed that enables …

Transportation Engineering: Traffic Control Simulator, Sarah V. Hernandez, Karla Diaz-Corro, Taslima Akter, Magdalena Asborno, Fu Durandal

Civil Engineering Teaching and Learning

The purpose of these lesson plans is to introduce students to traffic signalization basics. Students will be lead through a series of mini-lectures on traffic control and signalization including a discussion on the limitations and benefits of traffic signalization. The lesson plans compliment a computer simulation “game” in which students act as manual operators for a single up to four by four gridded intersection. Students attempt to control the progression of signals to understand the relationship between signal timing and user delay. Through experimentation with the simulation, students generate a presentation discussing the benefits and drawbacks of signal timing and …

Exploiting Hardware Abstraction For Parallel Programming Framework: Platform And Multitasking, Hongyuan Ding

Graduate Theses and Dissertations

With the help of the parallelism provided by the fine-grained architecture, hardware accelerators on Field Programmable Gate Arrays (FPGAs) can significantly improve the performance of many applications. However, designers are required to have excellent hardware programming skills and unique optimization techniques to explore the potential of FPGA resources fully. Intermediate frameworks above hardware circuits are proposed to improve either performance or productivity by leveraging parallel programming models beyond the multi-core era.

In this work, we propose the PolyPC (Polymorphic Parallel Computing) framework, which targets enhancing productivity without losing performance. It helps designers develop parallelized applications and implement them on FPGAs. …