Computer Engineering Commons^™

Evaluation Of Tracking Regimes For, And Security Of, Pli Systems, Shayan Taheri

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

In recent years, the researchers and engineers have realized that the trustiness of computer and networking devices and hardware can no longer be examined properly using the existing identification and security checking methods that operate based on the digital representation of data. As an example, since the digital identifiers can be copied, it is difficult to tie a digital identity to a device for sure. Also, the new or present created cyber attacks can manipulate the used digital data in a network easily. Due to these issues, the trend in development of new identification and security checking methods has moved …

Runtime Detection Of A Bandwidth Denial Attack From A Rogue Network-On-Chip, Rajesh Jayashankarashridevi

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Chips with high computational power are the crux of today’s pervasive complex digital systems. Microprocessor circuits are evolving towards many core designs with the integration of hundreds of processing cores, memory elements and other devices on a single chip to sustain high performance computing while maintaining low design costs. Two decisive paradigm shifts in the semiconductor industry have made this evolution possible: (a) architectural and (b) organizational.

At the heart of the architectural innovation is a scalable high speed data communication structure, the network-on-chip (NoC). NoC is an interconnect network for the glueless integration of on-chip components in the …

An Online Wear State Monitoring Methodology For Off-The-Shelf Embedded Processors, Srinath Arunachalam

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Every year transistors are becoming smaller and smaller. The continued trend of transistors becoming smaller has led to double amount of transistors being placed in the same area of space from its previous generation. This has led to an exponential increase in the amount of power per unit volume on-chip, which has resulted in increasing temperature. In turn, the increase in temperature directly leads to the increase in the rate of wear of a processor. Negative-bias temperature instability (NBTI) is one of the most dominant integrated circuit (IC) failure mechanisms [5, 13] that strongly depends on temperature. NBTI manifests in …