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Full-Text Articles in Computer Engineering

Design And Implementation Of A High Performance Network Processor With Dynamic Workload Management, Padmaja Duggisetty Jan 2015

Design And Implementation Of A High Performance Network Processor With Dynamic Workload Management, Padmaja Duggisetty

Masters Theses

Internet plays a crucial part in today's world. Be it personal communication, business transactions or social networking, internet is used everywhere and hence the speed of the communication infrastructure plays an important role. As the number of users increase the network usage increases i.e., the network data rates ramped up from a few Mb/s to Gb/s in less than a decade. Hence the network infrastructure needed a major upgrade to be able to support such high data rates. Technological advancements have enabled the communication links like optical fibres to support these high bandwidths, but the processing ...


Parallel Multi-Core Verilog Hdl Simulation, Tariq B. Ahmad May 2014

Parallel Multi-Core Verilog Hdl Simulation, Tariq B. Ahmad

Doctoral Dissertations

In the era of multi-core computing, the push for creating true parallel applications that can run on individual CPUs is on the rise. Application of parallel discrete event simulation (PDES) to hardware design verification looks promising, given the complexity of today’s hardware designs. Unfortunately, the challenges imposed by lack of inherent parallelism, suboptimal design partitioning, synchronization and communication overhead, and load balancing, render this approach largely ineffective. This thesis presents three techniques for accelerating simulation at three levels of abstraction namely, RTL, functional gate-level (zero-delay) and gate-level timing. We review contemporary solutions and then propose new ways of speeding ...


Cad Tools For Synthesis Of Sleep Convention Logic, Parviz Palangpour May 2013

Cad Tools For Synthesis Of Sleep Convention Logic, Parviz Palangpour

Theses and Dissertations

This dissertation proposes an automated flow for the Sleep Convention Logic (SCL) asynchronous design style. The proposed flow synthesizes synchronous RTL into an SCL netlist. The flow utilizes commercial design tools, while supplementing missing functionality using custom tools. A method for determining the performance bottleneck in an SCL design is proposed. A constraint-driven method to increase the performance of linear SCL pipelines is proposed. Several enhancements to SCL are proposed, including techniques to reduce the number of registers and total sleep capacitance in an SCL design.


Full Custom Vlsi Design Of On-Line Stability Checkers, Chris Y. Lee Aug 2011

Full Custom Vlsi Design Of On-Line Stability Checkers, Chris Y. Lee

Master's Theses and Project Reports

A stability checker is a clocked storage element, much like a flip-flop, which detects unstable and late signals in the pipeline of a digital system. The On-line stability checker operates concurrently with its associated circuit-under-test (CUT). This thesis describes the full custom very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course at Cal Poly.

A method for concurrent fault testing called On-line Stability Checking ...


Propagation Of Plate Acoustic Waves In Contact With Fluid Medium, Nagaraj Ghatadi Suraji Apr 2011

Propagation Of Plate Acoustic Waves In Contact With Fluid Medium, Nagaraj Ghatadi Suraji

Master's Theses (2009 -)

The characteristics of acoustic waves propagating in thin piezoelectric plates in the presence of a fluid medium contacting one or both of the plate surfaces are investigated. If the velocity of plate wave in the substrate is greater than velocity of bulk wave in the fluid, then a plate acoustic wave (PAW) traveling in the substrate will radiate a bulk acoustic wave (BAW) in the fluid. It is found that, under proper conditions, efficient conversion of energy from plate acoustic waves to bulk acoustic waves and vice versa can be obtained. For example, using the fundamental anti symmetric plate wave ...


A Subthreshold Reconfigurable Architecture For Harsh Environments, Ameet Chavan Jan 2010

A Subthreshold Reconfigurable Architecture For Harsh Environments, Ameet Chavan

Open Access Theses & Dissertations

Energy harvesting and functional reconfigurability are necessary features in order to simultaneously achieve longer operating lifetimes and versatility in application for many next generation electronic systems. The presented research incorporates capabilities that not only enable applications to self-power from ambience but also permit change in functionality based on real-time application requirements. Currently, many applications are battery powered with custom hardware, which severely confines the application platform. Moreover, maintenance and upgrades are prohibitively expensive, particularly in the case of remote locations with limited accessibility. For harsh environments like Space or the battlefield, apart from features such as low power and reconfigurability ...