Computer Engineering Commons^™

Efficient Fpga Architectures For Separable Filters And Logarithmic Multipliers And Automation Of Fish Feature Extraction Using Gabor Filters, Arjun Kumar Joginipelly

University of New Orleans Theses and Dissertations

Convolution and multiplication operations in the filtering process can be optimized by minimizing the resource utilization using Field Programmable Gate Arrays (FPGA) and separable filter kernels. An FPGA architecture for separable convolution is proposed to achieve reduction of on-chip resource utilization and external memory bandwidth for a given processing rate of the convolution unit.

Multiplication in integer number system can be optimized in terms of resources, operation time and power consumption by converting to logarithmic domain. To achieve this, a method altering the filter weights is proposed and implemented for error reduction. The results obtained depict significant error reduction when …