Computer Engineering Commons^™

Mutual Interference Investigation Of Cebus And X-10 Powerline Signaling, Sajid Pallithotungal

Theses

Powerline control signaling using CEBus has great potential towards inexpensive home automation. CEBus transmits at 10 kBps using spread spectrum in the 100-400 kHz band while X-l0 sends 60 Bps using bursts of 120 kHz carrier on the power line. However, these two signals may destructively interfere when present simultaneously. X-10 is narrow band and interferes with the CEBus spread spectrum signal. This thesis looks into the mutual interference patterns of Power Line CEBus communication in the presence of X-l0 module signaling and visa versa. The investigation encompasses a series of tests and measurements on a Power Line CEBus-X10 test …

Multi-Lifecycle Assessment Design Tools And Software Development, Ji Jin

Theses

This thesis introduces the concept of Multi-lifecycles and a Multi-lifecycle assessment (MLCA) methodology for evaluating the energy consumption and environmental emissions of a product. MLCA quantifies materials, energy, and environmental burdens associated with end-of-life options, as well as obtains the value of returning parts and materials back to use, through demanufacturing, reengineering and remanufacturing.

A Multi-lifecycle Assessment software is developed as a tool to implement MLCA methodologies. By this software, one can practice a full life-cycle analysis on a product, or compare the environmental impacts of different products. Detailed designs on MLCA software including the databases, user interfaces, and algorithm …

Design Of Components For A Generic Microprocessor Architecture, Pradnesh R. Mohare

Theses

The objective of this thesis was to develop a generic microprocessor design that can be adapted to many of the existing 16 bit microprocessors. Common features of various microprocessors were used to develop the design of many generic components which can then be used to design the required microprocessors instead of custom-designing each one of them separately. The components were designed using a CISC based micro-programmed design approach as that was more suitable in terms of design and verification time for generic implementation. The generic parts designed include the Register File for temporary data storage, the Effective Address Calculator that …

Design, Implementation, And Evaluation Of A Shared-Memory Parellel Processing System (Smpps), Eric H. Staub

Theses

As technology reaches its limits of improvements in microprocessor processing speeds, scientists and engineers have to find viable solutions to meet ever-increasing demands for faster processing speed. One such solution is parallel processing. No longer does one have to wait on sequential operations. A specific task can be split in sub-tasks that can run simultaneously, thus reducing the overall execution time of the task.

The design and implementation of these systems is crucial to the effectiveness of parallel systems. A dual-processor SMPPS was designed and implemented in order to demonstrate how multiple processors are a viable solution to increasing the …