Engineering Commons^™

Audio Beat Detection With Application To Robot Drumming, Michael James Engstrom

Dissertations and Theses

This Drumming Robot thesis demonstrates the design of a robot which can play drums in rhythm to an external audio source. The audio source can be either a pre-recorded .wav file or a live sample .wav file from a microphone. The dominant beats-per-minute (BPM) of the audio would be extracted and the robot would drum in time to the BPM. A Fourier Analysis-based BPM detection algorithm, developed by Eric Scheirer (Tempo and beat analysis of acoustical musical signals)ⁱ was adopted and implemented. In contrast to other popular algorithms, the main advantage of Scheirer's algorithm is it has …

Compressive Sensing Based Imaging Via Belief Propagation, Preethi Modur Ramachandra

Masters Theses and Doctoral Dissertations

Multiple description coding (MDC) using Compressive Sensing (CS) mainly aims at restoring an image from a small subset of samples with reasonable accuracy using an iterative message passing decoding algorithm commonly known as Belief Propagation (BP). The CS technique can accurately recover any compressible or sparse signal from a lesser number of non-adaptive, randomized linear projection samples than that specified by the Nyquist rate. In this work, we demonstrate how CS-based encoding generates measurements from the sparse image signal and the measurement matrix. Then we demonstrate how a BP decoding algorithm reconstructs the image from the measurements generated. In our …

Application Of Antenna Synthesis And Digital Signal Processing Techniques For Active Millimeter-Wave Imaging Systems, Wilson Ariel Caba

Electronic Theses and Dissertations

Millimeter-wave imaging has gathered attention in recent years for its ability to penetrate clothing, thin layers of soils, and certain construction materials. However, image quality remains a challenge that needs to be addressed. One way of improving image quality is by increasing the dimensions of the collecting aperture. A sparse array can be used to synthesize a larger aperture with a limited set of relatively small detectors. In this research we design, build, and test a test-bed having an active source at 94 GHz and an array of coherent detectors, mounted on arms that extend radially on a rotary table. …

A Cable/Wireless Modulation/Demodulation Frontend Module For High Speed/Broadband Datalink, Pay Peng Clarice Chong

Theses : Honours

What are the modulation/demodulation schemes that are suitable tor cable or wireless high speed or broadband data link, between 1 Mbps to 30 Mbps? The recent adoption of modulation schemes such as OFDM, 8-VSB, OAM, for Digital Television broadcast (DTV), Asymmetrical Digital Subscriber Lines (ADSL), and Cable Modem (CM) for Internet access, is poss'1ble because of the increase bit/Hz in these modulations over conventional modulation schemes. These modulation/demodulation schemes could also offer similar advantages to dedicated data link applications such as home-networking using cable or wireless medium. This report document the project implementation of Quadrature Amplitude Modulation as the modulation …

Static Compaction Of Test Sequences For Synchronous Sequential Circuits, Lijie Qi

Dissertations and Theses

Today, VLSI design has progressed to a stage where it needs to incorporate methods of testing circuits. The Automatic Test Pattern Generation (ATPG) is a very attractive method and feasible on almost any combinational and sequential circuit.

Currently available automatic test pattern generators (ATPGs) generate test sets that may be excessively long. Because a cost of testing depends on the test length. compaction techniques have been used to reduce that length. The motivation for studying test compaction is twofold. Firstly, by reducing the test sequence length. the memory requirements during the test application and the test application time are reduced. …

Jitter And Wander Reduction For A Sonet Ds3 Desynchronizer Using Predictive Fuzzy Control, Kevin Blythe Stanton

Dissertations and Theses

Excessive high-frequency jitter or low-frequency wander can create problems within synchronous transmission systems and must be kept within limits to ensure reliable network operation. The emerging Synchronous Optical NETwork (SONET) introduces additional challenges for jitter and wander attenuation equipment (called desynchronizers) when used to carry payloads from the existing Plesiochronous Digital Hierarchy (PDH), such as the DS3. The difficulty is primarily due to the large phase transients resulting from the pointer-based justification technique employed by SONET (called Pointer Justification Events or PJEs). While some previous desynchronization techniques consider the buffer level in their control actions, none has explicitly considered wander …

Design Of A Digital Compensation Filter, Nader Fakhry

Dissertations and Theses

The 24-bit Motorola DSP56001 processor will be used in combination with the DSP56ADC16 and the PCM-56 to design a good FIR compensation filter. Our objective is to digitize the input analog signal, and to compensate for the attenuation in the magnitude response of the digital sine wave. Two different experiments will be conducted, a hands on approach, and a simulation program. The first one will be realized directly, using the DSP system. We will determine the magnitude response of the system, and then deduce the coefficients of the FIR sin(x)/x filter. A look up table will store those values which …

Automatic Tuning Of Integrated Filters Using Neural Networks, Lutz Henning Lenz

Dissertations and Theses

Component values of integrated filters vary considerably due to· manufacturing tolerances and environmental changes. Thus it is of major importance that the components of an integrated filter be electronically tunable. The method explored in this thesis is the transconductance-C-method.

A method of realizing higher-order filters is to use a cascade structure of second-order filters. In this context, a method of tuning second-order filters becomes important.

The research objective of this thesis is to determine if the Neural Network methodology can be used to facilitate the filter tuning process for a second-order filter (realized via the transconductance-C-method). Since this thesis is, …

Applications Of Digital Signal Processing With Cardiac Pacemakers, Merry Thi Tran

Dissertations and Theses

Because the voltage amplitude of a heart beat is small compared to the amplitude of exponential noise, pacemakers have difficulty registering the responding heart beat immediately after a pacing pulse. This thesis investigates use of digital filters, an inverse filter and a lowpass filter, to eliminate the effects of exponential noise following a pace pulse. The goal was to create a filter which makes recognition of a haversine wave less dependent on natural subsidence of exponential noise.

Research included the design of heart system, pacemaker, pulse generation, and sensor system simulations. The simulation model includes the following components:

• Signal source, …

Characterization Of Quantization Noise In Oversampled Analog To Digital Converters, Eric W. Multanen

Dissertations and Theses

The analog to digital converter (ADC) samples a continuous analog signal and produces a stream of digital words which approximate the analog signal. The conversion process introduces noise into the digital signal. In the case of an ideal ADC, where all noise sources are ignored, the noise due to the quantization process remains. The resolution of the ADC is defined by how many bits are in the digital output word. The amount of quantization noise is clearly related to the resolution of the ADC. Reducing the quantization noise results in higher effective resolution.

An Implementation Of Bionomial-Qmf For Subband Coding Of Speech, Feng Chen

Theses

A real-time subband speech codec is implemented by the author on TMS320C25 digital signal processor based hardware for speech compression down to 0.25 bit per sample.

The Binomial Quadrature Mirror Filters (B-QMFs) are employed as the basic block for the hierarchical, dynamic tree, analysis/synthesis filter bank. After the analysis, available bits are optimally allocated among subbands. Band statistics are updated to overcome the nonstationarities of speech signal.

The energy compaction performance of this codec is compared with different subband and DCT in simulations for speech signals and AR(1) source models.

It is shown that the speech codec implemented provides an …

Computer Simulation Of Dynamic Systems, Charles G. Smith

Retrospective Theses and Dissertations

Computer simulation of a control system is a valuable tool in design or performance evaluation. This is especially true when non-linear elements cannot be ignored and must be included within the model. A general purpose block diagram oriented simulation program will be developed which can utilize continuous, discrete and non-linear building blocks. The software tool will be demonstrated by means of an example.

Internal Precision And The Common Sample Rate, James C. Kirkwood

Retrospective Theses and Dissertations

The relationship between internal precision and input/output precision and the ratio of sample frequency to signal frequency has been described in qualitative terms for the general case and in quantitative terms for many special cases. This paper attempts to generate quantitative approximated guidelines for the general case. Lowpass and bandpass digital filters are implemented using cascaded second order sections via a program that varies the amount of internal precision available for the emulation, and calculates the error produced compared to a 64 bit standard. The errors are plotted, and general equations relating input/output precision and internal precision and the ratio …

Suitability Of The Tms320 Digital Signal Processor In Digital Signal Processing Applications Requiring Multiple-Precision, Randall L. Walker

Retrospective Theses and Dissertations

The TMS320 single-chip digital signal processor, produced by Texas Instruments, shows promise for a long life-cycle not only because it fills a technical need in the digital signal processing field; but because it also represents an excellent early design. Furthermore, Texas Instruments has provided thorough software and development support. However, this chip was not designed to support digital signal processing applications which require multiple-precision operations. In this paper, algorithms were developed and expressed in macros that provide the capability of modeling systems requiring multiple-precision operations. Finally, a performance envelope showing the system complexity versus sampling bandwidth limitations is provided to …

Digital Signal Processing Capabilities Of The Fujitsu Mb8764, Harold B. Creech

Retrospective Theses and Dissertations

The Fujitsu MB8764 digital signal processing chip is designed to operate with a machine cycle of up to 10 MHz. The chip’s ability to perform a 16-by-16 bit multiply and add operation in one machine cycle makes it a good candidate for real time digital signal processing. Unlike the Intel 2920 the Fujitsu MB8764 does not have an onboard analog-to-digital, digital-to-analog converter. Therefore, this paper will be restricted to the operation of this device with digital data input and output. The use of the MB8764 as a digital filter is analyzed. Performance limitations due to finite word length, memory size …

Effects Of Finite Length Registers On A Modified Directform Realization Of A High Order H(Z) Transfer Function, Angel Vanrell

Retrospective Theses and Dissertations

When a digital process is realized on a general-purpose computer or a special-purpose hardware, errors due to finite register length are introduced. These errors are due primarily to arithmetic roundoff, coefficient quantization, and scaling rules. This paper addresses the effects of finite word length on a direct-form implementation of a high order H (z) transfer function. The development and analysis of a modified direct-form realization suggested by Dr. Fred O. Simons, are carried out via FORTRAN emulation of a fourth-order low-pass Butterworth filter. The results are presented as a parametric tradeoff of signal-to-noise ratio at the filter output versus word …

The Frequency Response Computation Of H(Z) Models That Include Digital Error Effects, Carol R. Smith

Retrospective Theses and Dissertations

Pulse responses are not suitable for evaluating H(z) frequency responses that include digital errors. Digital error effects, however, are conveniently included in H(z) frequency response calculations based on the step response. A non-real time algorithm for computing the frequency response of a real time digital filters based on the filter step response is developed and verified through an example.

Finite Impulse Response Filter Implementation Via Windowing Technique, Thomas J. Horrigan

Retrospective Theses and Dissertations

This research report is devoted to an investigation of finite impulse response (FIR) filters and their implementation via windowing techniques. Analysis is restricted to those FIR filters that possess both a nonrecursive structure and a linear phase response. Initially an informative yet concise overview of FIR filters is presented. Some knowledge of "discrete – time" systems is assumed. Next, the concepts associated with FIR filter implementation through the utilization of window functions is developed. Analysis is performed in both the time and frequency domains. Results obtained define optimal window function criteria. The last design technique is devoted to computer aided …

The Fundamental Hardware Elements And Options Of Digital Signal Processing, Mark A. Hemmerlein

Retrospective Theses and Dissertations

The hardware available for digital signal processing is evaluated. The elements required for implementation of digital signal processing applications are identified. These elements--memories, ALUs and multipliers -- are analyzed. Then the operation of parts which make up a range of possible solutions are evaluated. Thus, the graduating engineer is aided in making a transition from the theoretical to the practical world.

A Real Time Microprocessor Based Digital Filter Implementation, Mark H. Shaver

Retrospective Theses and Dissertations

A major break-through in the real-time digital simulation of dynamic models has occurred with the introduction of the Intel 2920 digital signal processing chip. The problems and potentials for this new device are demonstrated by implementing an elliptic function digital low pass filter via the bilinear z-transform approach. The software implementation is presented. Debugging and software verification are accomplished via manufacturer's simulation software tools. The hardware performance is verified in the laboratory. The results of these efforts point to much promise for wide scale applications, however, problems associated with performance indicate early version chip problems.