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Full-Text Articles in Engineering
Analyzing The Pedestrian Evacuation Efficiency In Architecture Based On Different Facilities Layout, Zhihong Li, Yanjie Wen, Wangtu Xu, Qi Yue
Analyzing The Pedestrian Evacuation Efficiency In Architecture Based On Different Facilities Layout, Zhihong Li, Yanjie Wen, Wangtu Xu, Qi Yue
Journal of System Simulation
Abstract: Pedestrians escaping from the architecture are restricted by limited time and space. There are so many different exits, channels and bottleneck. Three kinds of facilities layout were designed to be initial schemes. The shortest escaping time was estimated by the different bottlenecks. Then, a safety escaping model based on the facilities layout and dynamic information was proposed, and the escaping time, area density and evacuation efficiency were analyzed by the simulation. The research indicates that by calculating and simulating the model can estimate the evacuation time for different schemes, and the result can provide some advices for facilities layout.
Features Of Designing The Architecture Of Intelligent Transport Systems, Jaffar Daeibal, Vyacheslav Lapshin, Dmitry Elkin, Sergey A. Kucherov
Features Of Designing The Architecture Of Intelligent Transport Systems, Jaffar Daeibal, Vyacheslav Lapshin, Dmitry Elkin, Sergey A. Kucherov
Karbala International Journal of Modern Science
In the global experience, intelligent transport systems (ITS) are recognized as a general transport ideology for integrating the achievements of telematics in all types of transport activities to solve economic and social problems: reducing accidents, improving the efficiency of public transport and cargo transportation, ensuring overall transport security, and improving environmental performance. Considering the design features of the intelligent transport system (ITS), there is a need to develop requirements for the functional and physical architecture as the main part of the ITS development. The creation of functional and physical architecture touches upon issues such as: the scheme of interaction between …
Mapping In The Humanities: Gis Lessons For Poets, Historians, And Scientists, Emily W. Fairey
Mapping In The Humanities: Gis Lessons For Poets, Historians, And Scientists, Emily W. Fairey
Open Educational Resources
User-friendly Geographic Information Systems (GIS) is the common thread of this collection of presentations, and activities with full lesson plans. The first section of the site contains an overview of cartography, the art of creating maps, and then looks at historical mapping platforms like Hypercities and Donald Rumsey Historical Mapping Project. In the next section Google Earth Desktop Pro is introduced, with lessons and activities on the basics of GE such as pins, paths, and kml files, as well as a more complex activity on "georeferencing" an historic map over Google Earth imagery. The final section deals with ARCGIS Online …
Research On Parametric Modeling Of Radar Electronic Warfare Visual Simulation, Jinliang Guo, Zhang Yang, Xiaoyan Li, Xue Yuan
Research On Parametric Modeling Of Radar Electronic Warfare Visual Simulation, Jinliang Guo, Zhang Yang, Xiaoyan Li, Xue Yuan
Journal of System Simulation
Abstract: In order to improve the versatility of electronic warfare scene simulation and reduce the repeated development, a parametric modeling approach was proposed. Based on the visual simulation development model of Vega Prime, the modular simulation architecture was designed to provide a unified design structure for parametric modeling. The method of parameter extraction and description was researched to standardize the design of simulation model parameters. Parameter constraint rules were researched to associate model parameters, avoid the conflict between parameters, and simplify parameter instantiation. A parametric visual simulation system of electronic warfare was designed and implemented. The parametric modeling process …
A Compiler Target Model For Line Associative Registers, Paul S. Eberhart
A Compiler Target Model For Line Associative Registers, Paul S. Eberhart
Theses and Dissertations--Electrical and Computer Engineering
LARs (Line Associative Registers) are very wide tagged registers, used for both register-wide SWAR (SIMD Within a Register )operations and scalar operations on arbitrary fields. LARs include a large data field, type tags, source addresses, and a dirty bit, which allow them to not only replace both caches and registers in the conventional memory hierarchy, but improve on both their functions. This thesis details a LAR-based architecture, and describes the design of a compiler which can generate code for a LAR-based design. In particular, type conversion, alignment, and register allocation are discussed in detail.