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Theses/Dissertations

Electrical engineering

Wright State University

Publication Year

Articles 1 - 6 of 6

Full-Text Articles in Engineering

Design And Demonstration Of A Physical, Multi-Agent Autonomous Controller Testbed, Eric A. Nees Jan 2017

Design And Demonstration Of A Physical, Multi-Agent Autonomous Controller Testbed, Eric A. Nees

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Navigation and control algorithms are often tested in a simulated environment before being deployed in physical systems. Although simulated environments provide a controlled setting to carefully evaluate performance, the designed scenarios are sometimes unrealistically ideal and may unintentionally omit circumstances or unmodeled interactions. This thesis presents the design, implementation, and practical demonstration of a physical testbed that enables the testing of multi-agent autonomous strategies in hardware on a small scale. Testing the algorithms at scale allows real-time exploration of the interaction and performance of both human and autonomous algorithms under non-ideal conditions while avoiding the costs and risks of full-scale, …


Effects Of The Kinematic Model On Forward-Model Based Spotlight Sar Ecm, David T. Pyles Jan 2017

Effects Of The Kinematic Model On Forward-Model Based Spotlight Sar Ecm, David T. Pyles

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Spotlight synthetic aperture radar (SAR) provides a high-resolution remote image formation capability for airborne platforms. SAR image formation processes exploit the amplitude, time, and frequency shifts that occur in the transmitted waveform due to electromagnetic propagation and scattering. These shifts are predictable through the SAR forward model which is dependent on the waveform parameters and emitter flight path. The approach to develop an electronic countermeasure (ECM) system that is founded on the SAR forward model implies that the ECM system should alter the radar's waveform in a manner that produces the same amplitude, time, and frequency shifts that a real …


Layout Implementation Of A 10-Bit 1.2 Gs/S Digital-To-Analog Converter In 90nm Cmos, Vinay Kumar Chunchu Jan 2017

Layout Implementation Of A 10-Bit 1.2 Gs/S Digital-To-Analog Converter In 90nm Cmos, Vinay Kumar Chunchu

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Digital-to-analog converters are the interface circuits between digital and analog domains. They are used in data communication applications and different sorts of applications where transformation amongst digital and analog signals is needed. High-speed data converters are needed to match the bandwidth demands of the present-day communication systems. This thesis presents the layout implementation of a 10-bit current steering DAC with a sampling rate of about 1.2 GS/s using CMOS 90 nm technology. Current steering DAC topology is used in high-speed applications. The DAC in this thesis is designed using a segmented architecture in which 4 LSB current cells are binary …


Design Of An 8-Bit Successive Approximation Pipelined Analog To Digital Converter (Sap-Adc) In 90 Nm Cmos, Vivek Kotti Jan 2017

Design Of An 8-Bit Successive Approximation Pipelined Analog To Digital Converter (Sap-Adc) In 90 Nm Cmos, Vivek Kotti

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Analog to Digital Converters bridge the gap between physical world and digital signal processing. Most times analog signals received from the real world needs to be amplified and converted to digital to impart various signal enhancements to the received signal. The digital signal is much suitable to operate on with less noise and well defined logic levels when compared to continuously varying analog signal. Communication systems demand ever-increasing bandwidth which unfortunately has been a huge limitation for present day ADCs. Hence, an architecture which combines the accuracy of a SAR -ADC with the concept of pipelining to increase the bandwidth …


A 13t Single-Ended Low Power Sram Using Schmitt-Trigger And Write-Assist, Praneeth Namala Jan 2017

A 13t Single-Ended Low Power Sram Using Schmitt-Trigger And Write-Assist, Praneeth Namala

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SRAMs are widely used in application based systems like medical instruments, portable electronic devices from caches to registers. Technology scaling of transistor into nanometer regime has substantially increased memory density that occupies large silicon area in today's IC's and consumes significant amount of active and leakage power. So, design requirements and challenges such as memory write and read speed, leakage power, noise margin and process-voltage-temperature (PVT) variations also significantly increase. In this thesis, a 13T single-ended low power SRAM using Schmitt-Trigger and write-assist technique is presented. It enhances read static noise margin, write-1 and read-0 access time, specifically at low …


Distributed Sensor Fault Diagnosis For Automated Highway Systems, Hui Chen Jan 2013

Distributed Sensor Fault Diagnosis For Automated Highway Systems, Hui Chen

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Fault diagnosis problems for large-scale nonlinear systems have attracted significant attentions from researchers in recent years. Most fault detection and isolation (FDI) methods have been proposed based on a centralized architecture. However, due to the complexity of the system, most of these centralized fault detection and diagnosis schemes are not able to delivery effective fault detection and isolation performance for a large-scale nonlinear system, which contains subsystems interacting with neighboring subsystems.

In this thesis, a distributed fault detection and isolation method is developed for the automated highway systems (AHS). For each subsystem of AHS, a distributed fault detection and isolation …