Engineering Commons^™

Modelling And Analysis Of Smart Grids For Critical Data Communication, Abdulfattah Noorwali

Electronic Thesis and Dissertation Repository

Practical models for the subnetworks of smart grid are presented and analyzed. Critical packet-delay bounds for these subnetworks are determined, with the overall objective of identifying parameters that would help in the design of smart grid with least end-to-end delay.

A single-server non-preemptive queueing model with prioritized critical packets is presented for Home Area Network (HAN). Closed-form expressions for critical packet delay are derived and illustrated as a function of: i) critical packet arrival rate, ii) service rate, iii) utilization factor, and iv) rate of arrival of non-critical packets. Next, wireless HANs using FDMA and TDMA are presented. Upper and …

Delay Extraction Based Equivalent Elmore Model For Rlc On-Chip Interconnects, Shamsul Arefin Siddiqui

Electronic Thesis and Dissertation Repository

As feature sizes for VLSI technology is shrinking, associated with higher operating frequency, signal integrity analysis of on-chip interconnects has become a real challenge for circuit designers. For this purpose, computer-aided-design (CAD) tools are necessary to simulate signal propagation of on-chip interconnects which has been an active area for research. Although SPICE models exist which can accurately predict signal degradation of interconnects, they are computationally expensive. As a result, more effective and analytic models for interconnects are required to capture the response at the output of high speed VLSI circuits. This thesis contributes to the development of efficient and closed …