Engineering Commons^™

Design Of Components For A Generic Microprocessor Architecture, Pradnesh R. Mohare

Theses

The objective of this thesis was to develop a generic microprocessor design that can be adapted to many of the existing 16 bit microprocessors. Common features of various microprocessors were used to develop the design of many generic components which can then be used to design the required microprocessors instead of custom-designing each one of them separately. The components were designed using a CISC based micro-programmed design approach as that was more suitable in terms of design and verification time for generic implementation. The generic parts designed include the Register File for temporary data storage, the Effective Address Calculator that …

Design, Implementation, And Evaluation Of A Shared-Memory Parellel Processing System (Smpps), Eric H. Staub

Theses

As technology reaches its limits of improvements in microprocessor processing speeds, scientists and engineers have to find viable solutions to meet ever-increasing demands for faster processing speed. One such solution is parallel processing. No longer does one have to wait on sequential operations. A specific task can be split in sub-tasks that can run simultaneously, thus reducing the overall execution time of the task.

The design and implementation of these systems is crucial to the effectiveness of parallel systems. A dual-processor SMPPS was designed and implemented in order to demonstrate how multiple processors are a viable solution to increasing the …

Design Of A Communications Interface For A Very High Performance Computer, Jesse Boyd Zydallis

Theses

PetaFLOPS computing power is the newest goal of Federal Government agencies, in the increasingly active supercomputer field. To obtain this performance goal by the year 2007, sophisticated parallel processing designs are required. To effectively create network interfaces/routers for interprocessor communications in such computer systems, it requires optimal hardware and software codesigns.

An interface is presented for the NJIT New Millennium Computing Point Design, a system that targets 100 TeraFLOPS performance by the year 2005. The router handles store-and-forward switching and wormhole routing for the system.

Data Broadcasting And Reduction, Prefix Computation, And Sorting On Reduced Hypercube (Rh) Parallel Computers, Arup Mukherjee

Theses

The binary hypercube parallel computer has been very popular due to its rich interconnection structure and small average internode distance which allow the efficient embedding of frequently used topologies. Communication patterns of many parallel algorithms also match the hypercube topology. The hypercube has high VLSI complexity. however. due to the logarithmic increase in the number of connections to each node with the increase in the number of dimensions of the hypercube. The reduced hypercube (RH) interconnection network. which is obtained by a uniform reduction in the number of links for each hypercube node. yields lower-complexity interconnection networks when compared to …

Processor Allocation For Partitionable Multiprocessor Systems, Nicholaos C. Antoniou

Theses

The processor allocation problem in an n-dimensional hypercube multipro-cessor is similar to the conventional memory allocation problem. The main objective is to maximize the utilization of available resources as well as minimize the inherent system fragmentation. In this thesis, a new processor allocation strategy is proposed, and compared with the existing strategies, such as, the Buddy strategy, the Single Gray Code strategy (SGC), the Multiple Gray Code (MGC), and the Maximal Set of Subcubes (MSS). We will show that our proposed processor allocation strategy outperforms the existing strategies, by having the advantage of being able to allocate unused processors to …

Deterministic And Adaptive Routing Algorithms For Mesh-Connected Computers, Yikui Cai

Theses

The two-dimensional mesh topology has been widely used in many multicomputer systems, such as the AMETEK Series 2010, Illiac IV, MPP, DAP, MasPar MP-1 and Intel Paragon. Its major advantages are its excellent scalability and simplicity. New generation multicomputer uses a switching technique called wormhole routing. The essential idea of wormhole routing is to advance a packet directly from incoming to outgoing channel without sorting it, as soon as enough information has been received in the packet header to select the outgoing channel. It has advantages of low latency and low error rate. The problems addressed by this thesis are …

Investigation Of Reduced Hypercube (Rh) Networks : Embedding And Routing Capabilities, Michalis A. Sideras

Theses

The choice of a topology for the interconnection of resources in a distributed-memory parallel computing system is a major design decision. The direct binary hypercube has been widely used for this purpose due to its low diameter and its ability to efficiently emulate other important structures. The aforementioned strong properties of the hypercube come at the cost of high VLSI complexity due to the increase in the number of communication ports and channels per node with an increase in the total number of nodes. The reduced hypercube (RH) topology, which is obtained by a uniform reduction in the number of …