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Journal of the Microelectronic Engineering Conference

Analog

Publication Year

Articles 1 - 5 of 5

Full-Text Articles in Engineering

Mems Multi-Actuated Bridge Switch, D Cabrera, L Fuller Jan 2010

Mems Multi-Actuated Bridge Switch, D Cabrera, L Fuller

Journal of the Microelectronic Engineering Conference

A MEMS multi-actuated bridge switch is developed and created using the RIT sub-micron CMOS process as a way to create a high speed switch with good isolation, power consumption and low loss. The bridge was imaged using a SEM before and after the bridge release. Not much difference could be seen, prompting further investigation. There was a suspicious looking bump in the middle of the bridge that led us to believe that the TEOS sacrificial layer was buried underneath polysilicon. A cross-cut of the bridge was done where the bumps could be seen transversally. A highlight etch was done, confirming …


Analog Ic Design And Fabrication, James Tom Jan 2002

Analog Ic Design And Fabrication, James Tom

Journal of the Microelectronic Engineering Conference

The purpose of this project was to test the performance of analog integrated circuits and to characterize the MOSFET SPICE parameters. The data that can be obtained from this testing can be helpful for further research in the area of Analog IC design. The Semiconductor & Microsystems Fabrication Laboratory (SMFL) is a constantly evolving facility, with equipment constantly entering and leaving the lab. The process technology used was the RIT Subμ-CMOS Process, a vehicle used to teach students about process integration, semiconductor manufacturing, and the effects of process technology and device operation. Therefore, the Sub-Micron process must adapt to changes …


Redesign Of An Eight-Bit, Ecl Dac To Facilitate Speed And Functionality Testing Of A Bi-Cmos Process, William A. Mcgee Jan 1988

Redesign Of An Eight-Bit, Ecl Dac To Facilitate Speed And Functionality Testing Of A Bi-Cmos Process, William A. Mcgee

Journal of the Microelectronic Engineering Conference

The redesign and layout of a clocked eight-bit digital to analog converter using emitter coupled logic is examined based on testing of the original circuit, simulation of ground node resistance and pinout compatibility to a produced part. The completed layout is subjectively compared to the original circuit design. Production and evaluation is pending at this time.


Ideas To Asics, Kevin Clukey Jan 1987

Ideas To Asics, Kevin Clukey

Journal of the Microelectronic Engineering Conference

The conception/completion/distribution of en Integrated circuit Idea Is the heart of RSIC (application-specific Integrated circuits) technology. Completing the transformation of en Idea to the design before the market window closes Is the designer's greatest concern. The euolution of sophisticated computer-aided design tools hes enabled functional simulation of analog end digital together within hours. R description of the latest software methodologies Is presented through an eHample of e possible RSIC Implementation.


Automated Capacitance-Voltage Measurement, Dale Webb Jan 1987

Automated Capacitance-Voltage Measurement, Dale Webb

Journal of the Microelectronic Engineering Conference

An IBH personal computer was used es en eutorT'l8tic data equlsitlon system for obtaining capacitance voltage (CV) measurements. An HP4145 parameter analyzer was used es en analog to digital converter end the resulting digitized CV data was analyzed on the VAX mainframe.