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Electrical and Computer Engineering Faculty Research & Creative Works

Equivalent Circuits

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Full-Text Articles in Engineering

Eliminating Via-Plane Coupling Using Ground Vias For High-Speed Signal Transitions, Songping Wu, Xin Chang, Christian Schuster, Xiaoxiong Gu, Jun Fan Oct 2008

Eliminating Via-Plane Coupling Using Ground Vias For High-Speed Signal Transitions, Songping Wu, Xin Chang, Christian Schuster, Xiaoxiong Gu, Jun Fan

Electrical and Computer Engineering Faculty Research & Creative Works

When a high-speed signal transits through a via that penetrates a plane pair, parallel-plane resonances can cause additional insertion loss for the signal. To eliminate this via-plane coupling, ground vias are added adjacent to the signal via. This paper discusses the impact of the ground vias as a function of the number of the ground vias, their locations, and the size of the plane pair. A block-by-block physics-based equivalent circuit modeling approach is used in the study. The underlying physics of the phenomenon and the design implications are also discussed in the paper.


Spice-Compatible Cavity And Transmission Line Model For Power Bus With Narrow Slots, Gang Feng, Yaojiang Zhang, James L. Drewniak, Lin Zhang Jul 2007

Spice-Compatible Cavity And Transmission Line Model For Power Bus With Narrow Slots, Gang Feng, Yaojiang Zhang, James L. Drewniak, Lin Zhang

Electrical and Computer Engineering Faculty Research & Creative Works

Segmental lumped circuits are derived from coupled transmission line model for a narrow slot on the power bus. Both electric and magnetic coupling are taken into account by distributed inductances and capacitances. Then a SPICE- compatible circuit model for the power bus with the narrow slot is proposed. In this model, the segmental lumped circuits are connected to the equivalent circuit, which is derived by a hybrid cavity model and segmentation method for irregular power/ground planes. The model is validated by comparing with the calculations of finite element method (FEM) for the self or mutual impedances of the two port …


Characterizing Package/Pcb Pdn Interactions From A Full-Wave Finite-Difference Formulation, Shishuang Sun, David Pommerenke, James L. Drewniak, Kai Xiao, Sin-Ting Chen, Tzong-Lin Wu Aug 2006

Characterizing Package/Pcb Pdn Interactions From A Full-Wave Finite-Difference Formulation, Shishuang Sun, David Pommerenke, James L. Drewniak, Kai Xiao, Sin-Ting Chen, Tzong-Lin Wu

Electrical and Computer Engineering Faculty Research & Creative Works

A novel approach of equivalent circuit model extraction is developed for modeling of integrated package and PCB power distribution networks (PDN). The integrated PDNs are formulated from a full-wave finite-difference algorithm, and the resulting matrix equations are converted to equivalent circuits. The equivalent circuits, as well as the decoupling capacitors and the attached circuit components, can be analyzed with a SPICE-like solver in both the time and frequency domains. The modeling of dielectric loss is also addressed. The method is used to model three PDN problems including a simple power bus, a BGA package mounting on a PCB, and a …


Circuit Models For Power Bus Structures On Printed Circuit Boards Using A Hybrid Fem-Spice Method, Todd H. Hubing, Chunlei Guo Jan 2006

Circuit Models For Power Bus Structures On Printed Circuit Boards Using A Hybrid Fem-Spice Method, Todd H. Hubing, Chunlei Guo

Electrical and Computer Engineering Faculty Research & Creative Works

Power bus structures consisting of two parallel conducting planes are widely used on high-speed printed circuit boards. In this paper, a full-wave finite-element method (FEM) method is used to analyze power bus structures, and the resulting matrix equations are converted to equivalent circuits that can be analyzed using SPICE programs. Using this method of combining FEM and SPICE, power bus structures of arbitrary shape can be modeled efficiently both in the time-domain and frequency-domain, along with the circuit components connected to the bus. Dielectric loss and losses due to the finite resistance of the power planes can also be modeled. …


Validation Of Equivalent Circuits Extracted From S-Parameter Data For Eye-Pattern Evaluation, Giuseppe Selli, Mauro Lai, Shaofeng Luan, James L. Drewniak, Richard E. Dubroff, Jun Fan, James L. Knighten, Norman W. Smith, Giulio Antonini, Antonio Orlandi, Bruce Archambeault, Samuel R. Connor Aug 2004

Validation Of Equivalent Circuits Extracted From S-Parameter Data For Eye-Pattern Evaluation, Giuseppe Selli, Mauro Lai, Shaofeng Luan, James L. Drewniak, Richard E. Dubroff, Jun Fan, James L. Knighten, Norman W. Smith, Giulio Antonini, Antonio Orlandi, Bruce Archambeault, Samuel R. Connor

Electrical and Computer Engineering Faculty Research & Creative Works

S-parameter circuit model extraction is usually characterized by a trade off between accuracy and complexity. Trading one feature for another may or may not affect the goodness of the reconstructed S-parameter data, which are obtained from frequency domain simulations of the models extracted. However, the ultimate test for the validity of these equivalent circuit representations should be left to eye-diagram simulations, which provide useful insights, from an SI point of view, about the degradation of the signal, as it travels through the system. Physics based simplication procedures can be used to tune the models and achieve less complexity, whereas the …


Extraction Of Spice-Type Equivalent Circuits Of Signal Via Transitions Using The Peec Method, Jingkun Mao, James L. Drewniak, Giulio Antonini, Antonio Orlandi Aug 2004

Extraction Of Spice-Type Equivalent Circuits Of Signal Via Transitions Using The Peec Method, Jingkun Mao, James L. Drewniak, Giulio Antonini, Antonio Orlandi

Electrical and Computer Engineering Faculty Research & Creative Works

Digital devices and discontinuities are typically analyzed by inserting their equivalent circuits into SPICE-type simulators. The partial element equivalent circuit method has been proven to be very useful for electromagnetic modeling. It can be used in both the time and the frequency domain. In this paper, the PEEC technique is employed as an efficient full-wave modeling tool to derive SPICE-type equivalent circuits of signal via transition structures. A nodal analysis technique is utilized in conjunction with the optimization algorithm to extract the equivalent circuits, whose component values are the parameters optimized. The good agreement between different approaches demonstrates that the …


A Time Domain Approach To Estimate Current Draw From Smt Decoupling Capacitors, Lin Zhang, Bruce Archambeault, Samuel Conner, James L. Knighten, Jun Fan, Norman W. Smith, Ray Alexander, Richard E. Dubroff, James L. Drewniak Aug 2004

A Time Domain Approach To Estimate Current Draw From Smt Decoupling Capacitors, Lin Zhang, Bruce Archambeault, Samuel Conner, James L. Knighten, Jun Fan, Norman W. Smith, Ray Alexander, Richard E. Dubroff, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

A time domain approach to investigate and predict impedances and scattering parameters of a DC power bus is proposed. This approach is based on a cavity model and is achieved using a circuit simulation tool - SPICE. A SPICE-based circuit model for triangular power plane segments is described, verified and applied to simulate both the frequency and time domain characteristics of an irregularly shaped two-layer PCB board. Furthermore, the current draw from a surface mount technology (SMT) decoupling capacitor is simulated and estimated using this approach. Near-field electromagnetic loop probes are used to validate the current estimation qualitatively. Additionally the …


Comparison Of Via Equivalent Circuit Model Accuracy Using Quasi-Static And Full-Wave Approaches, Bruce Archambeault, Samuel R. Connor, Jianmin Zhang, James L. Drewniak, Mauro Lai, Antonio Orlandi, Giulio Antonini, Albert E. Ruehli Aug 2004

Comparison Of Via Equivalent Circuit Model Accuracy Using Quasi-Static And Full-Wave Approaches, Bruce Archambeault, Samuel R. Connor, Jianmin Zhang, James L. Drewniak, Mauro Lai, Antonio Orlandi, Giulio Antonini, Albert E. Ruehli

Electrical and Computer Engineering Faculty Research & Creative Works

The EMC and signal integrity impact of printed circuit board (PCB) trace discontinuities, such as vias, where the signal is transitioned from one layer to another in the PCB stackup, have become significant recently with the use of very high speed signals in today''s systems. If these discontinuities are ignored, significant distortion of the high speed signal can occur, and in many cases, cause data errors. A fast and accurate technique to include the effect of via discontinuities in the typical design process is needed to ensure this distortion is considered if significant. Therefore, a simple equivalent circuit for the …


Effects Of Open Stubs Associated With Plated Through-Hole Vias In Backpanel Designs, Shaowei Deng, Jingkun Mao, Todd H. Hubing, James L. Drewniak, Jun Fan, James L. Knighten, Norman W. Smith, Ray Alexander, Chen Wang Aug 2004

Effects Of Open Stubs Associated With Plated Through-Hole Vias In Backpanel Designs, Shaowei Deng, Jingkun Mao, Todd H. Hubing, James L. Drewniak, Jun Fan, James L. Knighten, Norman W. Smith, Ray Alexander, Chen Wang

Electrical and Computer Engineering Faculty Research & Creative Works

Plated through-hole (PTH) vias are commonly used in printed circuit boards. They usually leave open stubs if the signal(s) does not transition the entire depth of the board. These open stubs can have a negative impact on signal transmission. This summary reports the investigation of the impact of the open via stubs in a typical backpanel design.


Common-Mode Current Due To A Trace Near A Pcb Edge And Its Suppression By A Guard Band, Yoshiki Kayano, Motoshi Tanaka, James L. Drewniak, Hiroshi Inoue Feb 2004

Common-Mode Current Due To A Trace Near A Pcb Edge And Its Suppression By A Guard Band, Yoshiki Kayano, Motoshi Tanaka, James L. Drewniak, Hiroshi Inoue

Electrical and Computer Engineering Faculty Research & Creative Works

The common-mode (CM) current due to a trace near a printed circuit board (PCB) edge, and its suppression by a guard band have been studied experimentally and with finite-difference time-domain (FDTD) modeling. As the guard band, copper tape is connected along the entire edge of the ground plane. First, a PCB electromagnetic interference (EMI) coupling path that results from the nonzero impedance of the PCB ground plane is discussed. As the trace is moved closer to the PCB edge, the CM current increases. Then, the effect of the guard band on the CM current is detailed. A guard band parallel …


Memory Dimm Dc Power Distribution Analysis And Design, Jingkun Mao, Chen Wang, Giuseppe Selli, Bruce Archambeault, James L. Drewniak Aug 2003

Memory Dimm Dc Power Distribution Analysis And Design, Jingkun Mao, Chen Wang, Giuseppe Selli, Bruce Archambeault, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

DC power bus design is critical in meeting signal integrity (SI) and electromagnetic compatibility (EMC) requirements. A suitable modeling tool is beneficial to evaluate power bus design and develop design guidelines. This paper discusses difficulties met in evaluating the power distribution design on a dual inline memory module (DIMM) board, such as a power bus with arbitrary shape, parasitic inductance associated with vias, and so on. Moreover, some solutions are given in this paper. A simple cavity model with a segmentation method was employed to model a power bus with irregular shapes. The partial element equivalent circuit (PEEC) technique was …


Quantifying The Effects On Emi And Si Of Source Imbalances In Differential Signaling, Chen Wang, James L. Drewniak Aug 2003

Quantifying The Effects On Emi And Si Of Source Imbalances In Differential Signaling, Chen Wang, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

Imbalances in differential signaling can introduce common-mode components, resulting in signal integrity (SI) problems as well as EMI problems. Three-port mixed-mode S-parameters are employed to quantify the impacts on EMI. The EMI problems caused by delay skew and slew rate skew are investigated.


Lumped-Circuit Model Extraction For Vias In Multilayer Substrates, Jun Fan, James L. Drewniak, James L. Knighten May 2003

Lumped-Circuit Model Extraction For Vias In Multilayer Substrates, Jun Fan, James L. Drewniak, James L. Knighten

Electrical and Computer Engineering Faculty Research & Creative Works

Via interconnects in multilayer substrates, such as chip scale packaging, ball grid arrays, multichip modules, and printed circuit boards (PCB) can critically impact system performance. Lumped-circuit models for vias are usually established from their geometries to better understand the physics. This paper presents a procedure to extract these element values from a partial element equivalent circuit type method, denoted by CEMPIE. With a known physics-based circuit prototype, this approach calculates the element values from an extensive circuit net extracted by the CEMPIE method. Via inductances in a PCB power bus, including mutual inductances if multiple vias are present, are extracted …


Application Of The Cavity Model To Lossy Power-Return Plane Structures In Printed Circuit Boards, Minjia Xu, Hao Wang, Todd H. Hubing Jan 2003

Application Of The Cavity Model To Lossy Power-Return Plane Structures In Printed Circuit Boards, Minjia Xu, Hao Wang, Todd H. Hubing

Electrical and Computer Engineering Faculty Research & Creative Works

Power-return plane pairs in printed circuit boards are often modeled as resonant cavities. Cavity models can be used to calculate transfer impedance parameters used to predict levels of power bus noise. Techniques for applying the cavity model to lossy printed circuit board geometries rely on a low-loss assumption in their derivations. Boards that have been designed to damp power bus resonances (e.g., boards with embedded capacitance) generally violate this low-loss assumption. This paper investigates the validity of the cavity model when applied to printed circuit board structures where the board resonances are significantly damped. Cavity modeling results for sample lossy …


Analysis Of Simple Two-Capacitor Low-Pass Filters, Todd H. Hubing, David Pommerenke, Theodore M. Zeeff, Thomas Van Doren Jan 2003

Analysis Of Simple Two-Capacitor Low-Pass Filters, Todd H. Hubing, David Pommerenke, Theodore M. Zeeff, Thomas Van Doren

Electrical and Computer Engineering Faculty Research & Creative Works

The performance of typical low-pass capacitor filters is limited by the mutual inductance between the input and output sides of the filter. This paper describes how two appropriately spaced capacitors can be used to construct a low-pass filter with significantly better high-frequency performance than a one-capacitor filter. Laboratory measurements and numerical simulations are used to quantify the mutual inductance and compare the performance of one- and two-capacitor low-pass filters.


Transmission Line Modeling Of Vias In Differential Signals, Chen Wang, James L. Drewniak, Jun Fan, James L. Knighten, Norman W. Smith, Ray Alexander Aug 2002

Transmission Line Modeling Of Vias In Differential Signals, Chen Wang, James L. Drewniak, Jun Fan, James L. Knighten, Norman W. Smith, Ray Alexander

Electrical and Computer Engineering Faculty Research & Creative Works

Signal layer transitions in differential lines are modeled using both FDTD and equivalent circuit methods. The equivalent circuit is developed based on transmission-line reasoning regarding via behavior. Parameters of each transmission-line segment are obtained based on its corresponding physical geometry. The mixed-mode S-parameters from the equivalent circuit and the FDTD modeling are compared. Good agreement is demonstrated in the frequency range from 1 GHz to 20 GHz. The results indicate that vias in differential lines can be modeled as a transmission line for a quick and easy engineering estimation of the differential signal behavior in an environment of signal layer …


Extracting Cad Models For Quantifying Noise Coupling Between Vias In Pcb Layouts, Shaofeng Luan, Jun Fan, W. Liu, Fengchao Xiao, James L. Knighten, Norman W. Smith, Ray Alexander, Jim Nadolny, Yoshio Kami, James L. Drewniak May 2002

Extracting Cad Models For Quantifying Noise Coupling Between Vias In Pcb Layouts, Shaofeng Luan, Jun Fan, W. Liu, Fengchao Xiao, James L. Knighten, Norman W. Smith, Ray Alexander, Jim Nadolny, Yoshio Kami, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

A method to extract a lumped element prototype SPICE model is used to study noise coupling between non-parallel traces on a PCB. The parameters in this model are extracted using a PEEC-like approach, a Circuit Extraction approach based on a Mixed-Potential Integral Equation formulation (CEMPIE). Without large numbers of unknowns, the SPICE model saves computation time. Also, it is easy to incorporate into system SPICE net list to acquire the system simulation result considering the coupling between traces on the printed circuit board (PCB). A representative case is studied, and the comparison of measurements, CEMPIE simulation, and SPICE modeling are …


Efficient Modeling Of Discontinuities And Dispersive Media In Printed Transmission Lines, R. Araneo, Chen Wang, Xiaoxiong Gu, James L. Drewniak, S. Celozzi Mar 2002

Efficient Modeling Of Discontinuities And Dispersive Media In Printed Transmission Lines, R. Araneo, Chen Wang, Xiaoxiong Gu, James L. Drewniak, S. Celozzi

Electrical and Computer Engineering Faculty Research & Creative Works

The finite-difference time-domain method is applied to the analysis of transmission lines on printed circuit boards. The lossy, dispersive behavior of the dielectric substrate is accurately accounted for by means of several algorithms whose accuracy is discussed and compared. Numerical results are validated by comparisons with measurements and an equivalent circuit of slot in the ground plane is proposed.


Estimating The Power Bus Impedance Of Printed Circuit Boards With Embedded Capacitance, Minjia Xu, Todd H. Hubing Jan 2002

Estimating The Power Bus Impedance Of Printed Circuit Boards With Embedded Capacitance, Minjia Xu, Todd H. Hubing

Electrical and Computer Engineering Faculty Research & Creative Works

Embedded capacitance is an alternative to discrete decoupling capacitors and is achieved by enhancing the natural capacitance between closely spaced power and return planes. This paper employs a simple cavity model to investigate the features affecting the power bus impedance of printed circuit boards with embedded capacitance.


Esd Currents And Fields On The Vcp And The Hcp Modeled Using Quasi-Static Approximations, David Pommerenke, Wang Kai, Thomas Van Doren Jan 2002

Esd Currents And Fields On The Vcp And The Hcp Modeled Using Quasi-Static Approximations, David Pommerenke, Wang Kai, Thomas Van Doren

Electrical and Computer Engineering Faculty Research & Creative Works

The horizontal coupling plane (HCP) and the vertical coupling plane (VCP) are essential elements of the standardized electrostatic discharge (ESD) test. They are used for testing the robustness of equipment against indirect (nearby) discharges. This article analyzed the current and the fields on the HCP and the VCP using plane wave, transmission line, quasi-static theory. The objective is to illustrate the dominating physical processes on these planes. The work is based on measurements of the transient currents and fields using broadband sensors.


Differential Signalling In Pcbs: Modeling And Validation Of Dielectric Losses And Effects Of Discontinuities, R. Araneo, Chen Wang, Xiaoxiong Gu, S. Celozzi, James L. Drewniak Aug 2001

Differential Signalling In Pcbs: Modeling And Validation Of Dielectric Losses And Effects Of Discontinuities, R. Araneo, Chen Wang, Xiaoxiong Gu, S. Celozzi, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

This paper focuses on differential signal transmission above ground planes with gaps, taking into account the dielectric and conductive losses of the substrate. An equivalent lumped-circuit is proposed and its suitability is investigated by comparing the obtained numerical results with the measured data. Furthermore the differential to common mode conversion of the waves, while crossing the gap, is theoretically analyzed and experimentally verified.


Improving The High-Frequency Attenuation Of Shunt Capacitor, Low-Pass Filters, Christopher N. Olsen, Thomas Van Doren, Todd H. Hubing, James L. Drewniak, Richard E. Dubroff Aug 2001

Improving The High-Frequency Attenuation Of Shunt Capacitor, Low-Pass Filters, Christopher N. Olsen, Thomas Van Doren, Todd H. Hubing, James L. Drewniak, Richard E. Dubroff

Electrical and Computer Engineering Faculty Research & Creative Works

Circuit board mounted, shunt capacitive filters are less effective at high frequencies because of the mutual inductance (M) that exists between the input and output ports. An approximate expression for the mutual inductance is M=(μh/2π)ln(h/a); where h=via length and a=radius of the via connecting the capacitor to the return plane. The reduced mutual inductance associated with the new, three-terminal, surface-mounted capacitor results in more than 15 dB increased attenuation compared to two-terminal capacitors over the 0.3-6.0 GHz range with 50 Ω source and load terminations


Modeling Dc Power-Bus Structures With Vertical Discontinuities Using A Circuit Extraction Approach Based On A Mixed-Potential Integral Equation, Jun Fan, Hao Shi, Antonio Orlandi, James L. Knighten, James L. Drewniak May 2001

Modeling Dc Power-Bus Structures With Vertical Discontinuities Using A Circuit Extraction Approach Based On A Mixed-Potential Integral Equation, Jun Fan, Hao Shi, Antonio Orlandi, James L. Knighten, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

The DC power-bus is a critical aspect in high-speed digital circuit designs. A circuit extraction approach based on a mixed-potential integral equation is presented herein to model arbitrary multilayer power-bus structures with vertical discontinuities that include decoupling capacitor interconnects. Green's functions in a stratified medium are used and the problem is formulated using a mixed-potential integral equation approach. The final matrix equation is not solved, rather, an equivalent circuit model is extracted from the first-principles formulation. Agreement between modeling and measurements is good, and the utility of the approach is demonstrated for DC power-bus design.


Incorporating Two-Port Networks With S-Parameters Into Fdtd, Xiaoning Ye, James L. Drewniak Feb 2001

Incorporating Two-Port Networks With S-Parameters Into Fdtd, Xiaoning Ye, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

A modeling approach for incorporating a two-port network with S-parameters in the finite-difference time-domain (FDTD) method is reported in this paper. The proposed method utilizes the time-domain Y-parameters to describe the network characteristics, and incorporates the Y-parameters into the FDTD algorithm. The generalized pencil-of-function (GPOF) technique is applied to improve the memory efficiency of this algorithm by generating a complex exponential series for the Y-parameters and using recursive convolution in the FDTD updating equations. A modeling example is given, which shows that this approach is effective and accurate. This modeling technique can be extended for incorporating any number of N-port …


Challenge Problem Update: Peec And Mom Analysis Of A Pc Board With Long Wires Attached, H. Wang, Todd H. Hubing, Bruce Archambeault Jan 2001

Challenge Problem Update: Peec And Mom Analysis Of A Pc Board With Long Wires Attached, H. Wang, Todd H. Hubing, Bruce Archambeault

Electrical and Computer Engineering Faculty Research & Creative Works

At the 2000 IEEE International Symposium on EMC, a paper was presented by Y. Ji et al. (paper appears in 2001 proceedings) that compared the application of PEEC and MOM techniques to the analysis of one of the EMC Society/Applied Computational Electromagnetics Society special challenge problems. Good agreement was obtained between the two codes at 2 out of the 3 measurement ports. At that time, no definite explanation was provided for the discrepancy at the third port. This paper shows that the problem was (at least partly) related to assumptions made about the signal source


Applying The Method Of Moments And The Partial Element Equivalent Circuit Modeling Techniques To A Special Challenge Problem Of A Pc Board With Long Wires Attached, Yun Ji, Bruce Archambeault, Todd H. Hubing Jan 2001

Applying The Method Of Moments And The Partial Element Equivalent Circuit Modeling Techniques To A Special Challenge Problem Of A Pc Board With Long Wires Attached, Yun Ji, Bruce Archambeault, Todd H. Hubing

Electrical and Computer Engineering Faculty Research & Creative Works

This paper investigates a canonical printed circuit board (PCB) problem using both a method of moments (MoM) and a partial element equivalent circuit (PEEC) modeling technique. The problem consists of a PCB populated with three traces. One trace is a signal line and the other two are I/O lines that couple to the signal line and extend beyond the boundary of the board. Although the MoM code was a frequency domain code and the PEEC code was a time-domain code, good agreement was achieved in both the time-domain and the frequency-domain


Dc Power Bus Modeling Using A Circuit Extraction Approach Based On A Mixed-Potential Integral Equation Formulation And An Iterative Equation Solver, Jun Fan, James L. Drewniak, James L. Knighten Oct 2000

Dc Power Bus Modeling Using A Circuit Extraction Approach Based On A Mixed-Potential Integral Equation Formulation And An Iterative Equation Solver, Jun Fan, James L. Drewniak, James L. Knighten

Electrical and Computer Engineering Faculty Research & Creative Works

A quick and simple approach is developed to perform circuit simulations for an equivalent circuit extracted from a first principles formulation for DC power bus structures. The simulations are done by solving the system equation using an iterative method. Good agreement between modeling and measurements demonstrate the effectiveness of the method, which is very suitable and computationally efficient for frequency-domain DC power modeling.


Emi Resulting From A Signal Via Transition Through Dc Power Bus-Effectiveness Of Focal Smt Decoupling, Wei Cui, Xiaoning Ye, Bruce Archambeault, Doug White, Min Li, James L. Drewniak May 2000

Emi Resulting From A Signal Via Transition Through Dc Power Bus-Effectiveness Of Focal Smt Decoupling, Wei Cui, Xiaoning Ye, Bruce Archambeault, Doug White, Min Li, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

Signal vias are commonly used in multilayer printed circuit board (PCB) design. For a signal via transitioning through the internal power and ground planes, the return current has to jump from one reference plane to another reference plane. The discontinuity of the return current at the via excites the power and ground planes, and results in power bus noise, and can produce an EMI problem as well. Numerical methods, such as finite-difference time-domain (FDTD), moment methods (MoM), and partial element equivalent circuit (PEEC), were employed herein to study this problem. The modeled results were supported by the measurements. In addition, …


Modeling Emi Resulting From A Signal Via Transition Through Power/Ground Layers, Wei Cui, Xiaoning Ye, Bruce Archambeault, Doug White, Min Li, James L. Drewniak Mar 2000

Modeling Emi Resulting From A Signal Via Transition Through Power/Ground Layers, Wei Cui, Xiaoning Ye, Bruce Archambeault, Doug White, Min Li, James L. Drewniak

Electrical and Computer Engineering Faculty Research & Creative Works

Signal transitioning through layers on vias are very common in multi-layer printed circuit board (PCB) design. For a signal via transitioning through the internal power and ground planes, the return current must switch from one reference plane to another reference plane. The discontinuity of the return current at the via excites the power and ground planes, and results in noise on the power bus that can lead to signal integrity, as well as EMI problems. Numerical methods, such as the finite-difference time-domain (FDTD), Moment of Methods (MoM), and partial element equivalent circuit (PEEC) method, were employed herein to study this …


Considerations For Magnetic-Field Coupling Resulting In Radiated Emi, David M. Hockanson, James L. Drewniak, Richard E. Dubroff, Todd H. Hubing, Thomas Van Doren Aug 1998

Considerations For Magnetic-Field Coupling Resulting In Radiated Emi, David M. Hockanson, James L. Drewniak, Richard E. Dubroff, Todd H. Hubing, Thomas Van Doren

Electrical and Computer Engineering Faculty Research & Creative Works

Parasitic inductance in printed circuit board geometries can worsen the EMI performance and signal integrity of high-speed digital designs. Partial-inductance theory is a powerful tool for analyzing inductance issues in signal integrity. However, partial inductances may not adequately model magnetic flux coupling to EMI antennas because the EMI antennas are typically open loops. Therefore, partial inductances may not always accurately predict radiated EMI from noise sources, unless used in a full-wave analysis such as PEEC. Partial inductances can be used, however, to estimate branch inductances, which can be used to predict EMI. This paper presents a method for decomposing loop …