Engineering Commons^™

Synthesis Of Linear Reversible Circuits And Exor-And-Based Circuits For Incompletely Specified Multi-Output Functions, Ben Schaeffer

Dissertations and Theses

At this time the synthesis of reversible circuits for quantum computing is an active area of research. In the most restrictive quantum computing models there are no ancilla lines and the quantum cost, or latency, of performing a reversible form of the AND gate, or Toffoli gate, increases exponentially with the number of input variables. In contrast, the quantum cost of performing any combination of reversible EXOR gates, or CNOT gates, on n input variables requires at most O(n^₂/log₂n) gates. It was under these conditions that EXOR-AND-EXOR, or EPOE, synthesis was developed.

In this …

Synthesis Of Irreversible Incompletely Specified Multi-Output Functions To Reversible Eosops Circuits With Pse Gates, Robert Adrian Fiszer

Dissertations and Theses

As quantum computers edge closer to viability, it becomes necessary to create logic synthesis and minimization algorithms that take into account the particular aspects of quantum computers that differentiate them from classical computers. Since quantum computers can be functionally described as reversible computers with superposition and entanglement, both advances in reversible synthesis and increased utilization of superposition and entanglement in quantum algorithms will increase the power of quantum computing.

One necessary component of any practical quantum computer is the computation of irreversible functions. However, very little work has been done on algorithms that synthesize and minimize irreversible functions into a …

Just-In-Time Power Gating Of Gasp Circuits, Prachi Gulab Padwal

Dissertations and Theses

In modern integrated circuits, one way to reduce power consumption is to turn off power to parts of the circuit when those are idle. This method is called power gating. This thesis presents a state-preserving technique to achieve power savings in GasP family of asynchronous circuits by turning off the power when the circuit is idle. The power control logic turns on the power in anticipation of the receiving data. The power control logic turns off the power when the stage is idle either because it is empty or because the pipeline is clogged. The low logical effort of GasP …

Logic Design Using Programmable Logic Devices, Loc Bao Nguyen

Dissertations and Theses

The Programmable Logic Devices, PLO, have caused a major impact in logic design of digital systems in this decade. For instance, a twenty pin PLO device can replace from three hundreds to six hundreds Transistor Transistor Logic gates, which people have designed with since the 60s. Therefore, by using PLD devices, designers can squeeze more features, reduce chip counts, reduce power consumption, and enhance the reliability of the digital systems.

This thesis covers the most important aspects of logic design using PLD devices. They are Logic Minimization and State Assignment. In addition, the thesis also covers a seldomly used but …