Engineering Commons^™

Facilitating Mixed Self-Timed Circuits, Alexandra R. Hanson

University Honors Theses

Designers constrain the ordering of computation events in self-timed circuits to ensure the correct behavior of the circuits. Different circuit families utilize different constraints that, when families are combined, may be more difficult to guarantee in combination without inserting delay to postpone necessary events. By analyzing established constraints of different circuit families like Click and GasP, we are able to identify the small changes necessary to either 1) avoid constraints entirely; or 2) decrease the likelihood of necessary delay insertion. Because delay insertion can be tricky for novice designers and because the likelihood of its requirement increases when mixing different …

Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla

Dissertations and Theses

Many modern computer systems are distributed over space. Well-known examples are the Internet of Things and IBM's TrueNorth for deep learning applications. At the Asynchronous Research Center (ARC) at Portland State University we build distributed hardware systems using self-timed computation and delay-insensitive communication. Where appropriate, self-timed hardware operations can reduce average and peak power, energy, latency, and electromagnetic interference. Alternatively, self-timed operations can increase throughput, tolerance to delay variations, scalability, and manufacturability.

The design of complex hardware systems requires design automation and support for test, debug, and product characterization.

This thesis focuses on design compilation and test support for dataflow …