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Design And Implementation Of Fault Tolerant Adders On Field Programmable Gate Arrays, Lakshmi Phani Deepthi Bollepalli
Design And Implementation Of Fault Tolerant Adders On Field Programmable Gate Arrays, Lakshmi Phani Deepthi Bollepalli
Electrical Engineering Theses
Fault tolerance on various adder architectures implemented on Field Programmable Gate Arrays (FPGAs) is studied in this thesis. This involves developing error detection and correction techniques for the sparse Kogge-Stone adder and comparing it with Triple Modular Redundancy (TMR) techniques. Fault tolerance is implemented on a Kogge-Stone adder by taking advantage of the inherent redundancy in the carry tree. On a sparse Kogge-Stone adder, fault tolerance is realized by introducing additional ripple carry adders into the design. The implementation of this fault tolerance approach on the sparse Kogge-Stone adder is successfully completed and verified by introducing faults either on the …