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Electrical and Computer Engineering

Wright State University

Theses/Dissertations

2013

Direct Digital Synthesizer, ROM-Less, 16-Bit Accumulator, Multiplier-Less FIR Filter, Virtex 6 FPGA, CMOS 90nm Technology, Hardware Reuse, Pipe-Lined Design, ASIC

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Full-Text Articles in Engineering

Design And Implementation Of A 16-Bit Flexible Rom-Less Direct Digital Synthesizer In Fpga And Cmos 90nm Technology, Sunny Raj Dommaraju Jan 2013

Design And Implementation Of A 16-Bit Flexible Rom-Less Direct Digital Synthesizer In Fpga And Cmos 90nm Technology, Sunny Raj Dommaraju

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A ROM-less direct digital synthesizer architecture is presented in this thesis. This architecture eliminates the ROM-based phase to sine wave amplitude converter, which is a bottleneck for pushing clock frequencies into the gigahertz range. The design consists of a 16-bit phase accumulator, a set of 18 band pass finite impulse response filters, a 12-bit digital to analog converter and a low pass filter to produce a sine wave with output frequencies ranging from 36 MHz to 72 MHz with a resolution of 3.05 kHz and a 55 dB spur free dynamic range. The same hardware can be used to achieve …