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Experimental Study Of Fault Cones And Fault Aliasing, Vedanth Bilagi
Experimental Study Of Fault Cones And Fault Aliasing, Vedanth Bilagi
Dissertations and Theses
The test of digital integrated circuits compares the test pattern results for the device under test (DUT) to the expected test pattern results of a standard reference. The standard response is typically obtained from simulations. The test pattern and response are created and evaluated assuming ideal test conditions. The standard response is normally stored within automated test equipment (ATE). However the use of ATE is the major contributor to the test cost. This thesis explores an alternative strategy to the standard response. As an alternative to the stored standard response, the response is estimated by fault tolerant technique. The purpose …