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Using Reduced Graphs For Efficient Hls Scheduling, Stephanie Soldavini
Using Reduced Graphs For Efficient Hls Scheduling, Stephanie Soldavini
Theses
High-Level Synthesis (HLS) is the process of inferring a digital circuit from a high-level algorithmic description provided as a software implementation, usually in C/C++. HLS tools will parse the input code and then perform three main steps: allocation, scheduling, and binding. This results in a hardware architecture which can then be represented as a Register-Transfer Level (RTL) model using a Hardware Description Language (HDL), such as VHDL or Verilog. Allocation determines the amount of resources needed, scheduling finds the order in which operations should occur, and binding maps operations onto the allocated hardware resources. Two main challenges of scheduling are …
Home Energy Management System For Demand Response Purposes, Isra Adam Hussein Haroun
Home Energy Management System For Demand Response Purposes, Isra Adam Hussein Haroun
Theses
The growing demand for electricity has led to increasing efforts to generate and satisfy the rising demand. This led to suppliers attempting to reduce consumption with the help of the users. Requests to shift unnecessary loads off the peak hours, using other sources of generators to supply the grid while offering incentives to the users have made a significant effect. Furthermore, automated solutions were implemented with the help of Home Energy Management Systems (HEMS) where the user can remotely manage household loads to reduce consumption or cost. Demand Response (DR) is the process of reducing power consumption in a response …