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Analog Axon Hillock Neuron Design For Memristive Neuromorphic Systems, Ryan John Weiss
Analog Axon Hillock Neuron Design For Memristive Neuromorphic Systems, Ryan John Weiss
Masters Theses
Neuromorphic electronics studies the physical realization of neural networks in discrete circuit components. Hardware implementations of neural networks take advantage of highly parallelized computing power with low energy systems. The hardware designed for these systems functions as a low power, low area alternative to computer simulations. With on-line learning in the system, hardware implementations of neural networks can further improve their solution to a given task.In this work, the analog computational system presented is the computational core for running a spiking neural network model. This component of a neural network, the neuron, is one of the building blocks used to …
The Synthesis Of Memristive Neuromorphic Circuits, Austin Richard Wyer
The Synthesis Of Memristive Neuromorphic Circuits, Austin Richard Wyer
Masters Theses
As Moores Law has come to a halt, it has become necessary to explore alternative forms of computation that are not limited in the same ways as traditional CMOS technologies and the Von Neumann architecture. Neuromorphic computing, computing inspired by the human brain with neurons and synapses, has been proposed as one of these alternatives. Memristors, non-volatile devices with adjustable resistances, have emerged as a candidate for implementing neuromorphic computing systems because of their low power and low area overhead. This work presents a C++ simulator for an implementation of a memristive neuromorphic circuit. The simulator is used within a …
Tiled Danna: Dynamic Adaptive Neural Network Array Scaled Across Multiple Chips, Patricia Jean Eckhart
Tiled Danna: Dynamic Adaptive Neural Network Array Scaled Across Multiple Chips, Patricia Jean Eckhart
Masters Theses
Tiled Dynamic Adaptive Neural Network Array(Tiled DANNA) is a recurrent spiking neural network structure composed of programmable biologically inspired neurons and synapses that scales across multiple FPGA chips. Fire events that occur on and within DANNA initiate spiking behaviors in the programmable elements allowing DANNA to hold memory through the synaptic charge propagation and neuronal charge accumulation. DANNA is a fully digital neuromorphic computing structure based on the NIDA architecture. To support initial prototyping and testing of the Tiled DANNA, multiple Xilinx Virtex 7 690Ts were leveraged. The primary goal of Tiled DANNA is to support scaling of DANNA neural …
Scalable High-Speed Communications For Neuromorphic Systems, Aaron Reed Young
Scalable High-Speed Communications For Neuromorphic Systems, Aaron Reed Young
Masters Theses
Field-programmable gate arrays (FPGA), application-specific integrated circuits (ASIC), and other chip/multi-chip level implementations can be used to implement Dynamic Adaptive Neural Network Arrays (DANNA). In some applications, DANNA interfaces with a traditional computing system to provide neural network configuration information, provide network input, process network outputs, and monitor the state of the network. The present host-to-DANNA network communication setup uses a Cypress USB 3.0 peripheral controller (FX3) to enable host-to-array communication over USB 3.0. This communications setup has to run commands in batches and does not have enough bandwidth to meet the maximum throughput requirements of the DANNA device, resulting …