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Liquid Prebreakdown Phenomena And The Associated Involvement Of Electrohydrodynamic Processes., Diana Hua. Ren
Liquid Prebreakdown Phenomena And The Associated Involvement Of Electrohydrodynamic Processes., Diana Hua. Ren
Electronic Theses and Dissertations
Six dielectric liquids have been investigated for the confirmation of the EHD theory of current response to the application of ramped high voltage by using a prebreakdown technique. The conduction current and displacement current were measured and studied individually. Upon plotting conduction current as well as displacement current on a log V -log I scale, two linear portions of the current characteristics were observed in the high stress regime. Thus two separate regimes of the characteristic were found exhibiting current transport in direct proportion to a simple power of the applied voltage, $\rm I\propto V\sp{s}$ (or $\rm I \propto V\sp{g}$ …
Synthesis Of Multilevel Pass Transistor Logic Networks., Arunita. Jaekel
Synthesis Of Multilevel Pass Transistor Logic Networks., Arunita. Jaekel
Electronic Theses and Dissertations
Traditional design of logic circuits involves implementing a function in terms of standard logic gates. However, this type of design does not fully exploit the unique switching properties of MOSFETs, which can lead to more efficient realizations. Over the past decade there has been considerable interest in Pass Transistor Logic (PTL) circuits. PTL circuits implement a logic function as a network of NMOS transistors. They show enhanced performance over conventional logic in terms of both speed and area optimization as well as reduced power dissipation, particularly for certain classes of circuits. Existing synthesis techniques for PTL are limited to two-level …
Bicmos Implementation Of The Hierarchy For Pattern Extraction Artificial Neural Network., Kai Yiu. Hung
Bicmos Implementation Of The Hierarchy For Pattern Extraction Artificial Neural Network., Kai Yiu. Hung
Electronic Theses and Dissertations
This thesis presents the architecture and the algorithm of the Hierarchy for Pattern Extraction (HyPE) artificial neural network. The training algorithm and the recalling algorithm of the HyPE artificial neural network are rewritten into C based on a Smalltalk prototype. A switching tree minimization program is introduced that provides logic minimization capable of handling a higher transistor tree height and merges several transistor trees. The Northern Telecom 0.8$\mu$ Bipolar Complementary Metal Oxide Semiconductor (BATMOS) technology is used to implement the designs in this thesis. There are two final dynamic neuron designs that have been verified and fabricated. One neuron uses …
Digital Network Analysis Automation., Jacky W. Y. Luk
Digital Network Analysis Automation., Jacky W. Y. Luk
Electronic Theses and Dissertations
This thesis presents the development of a software package for the purpose of analyzing digital networks. The software package consists of two graphic user interfaces, one for the signal flow graph schematic drawing, and one for the analysis of digital network. Both are written in the WATFOR-77 programming language and by using the VGAWAT graphics library. The first graphic user interface software is to draw the signal flow graph of a 1-D, 2-D, or 3-D digital network using adders, delays, and multipliers. It can extract the graphical representation of a digital network with error checking capability into a netlist for …
Fpga Implementation Of Adaptive Interference Canceler For Periodic Signal., Tony Wai Sing. Yuen
Fpga Implementation Of Adaptive Interference Canceler For Periodic Signal., Tony Wai Sing. Yuen
Electronic Theses and Dissertations
This thesis describes the design, implementation and testing of an adaptive digital interference canceler for periodic signals. This canceler uses the least mean-square (LMS) adaptive filtering technique to eliminate interference from an input signal. An advantage of the adaptive interference cancelling approach is that it requires no prior knowledge of both the signal and the interference characteristics. A digital design approach is used in this thesis because of its reliability and accuracy. The canceler implemented using a Xilinx FPGA chip. A prototype design demonstrated that the canceler was able to reduce the input interference power by about 40%.Dept. of Electrical …
Fpga Implementation Of Rns Structures., Radhaselvi. Venkatesan
Fpga Implementation Of Rns Structures., Radhaselvi. Venkatesan
Electronic Theses and Dissertations
The objective of this thesis is to investigate the applicability of Field Programmable Gate Arrays (FPGAs) for residue arithmetic applications. FPGAs are programmable devices that can be directly configured by the end user without the use of an integrated circuit fabrication facility. They offer the designer the benefits of custom hardware, eliminating high development costs and manufacturing time. The Residue Number System (RNS) has often been proposed for custom hardware implementation of high throughput DSP algorithms. Residue arithmetic operations are easier to realize using small look-up tables, and since Xilinx FPGAs use look-up tables as configurable logic blocks, they are …
Fuzzy Inference Networks For Pattern Recognition., Yaling. Cai
Fuzzy Inference Networks For Pattern Recognition., Yaling. Cai
Electronic Theses and Dissertations
This dissertation presents a study of fuzzy inference networks for pattern recognition problems. In this research, fuzzy neurons are defined and five types of fuzzy neurons are introduced. Three fuzzy inference models for pattern recognition systems, min-max inference model, min-sum inference model, and min-competitive inference model, are developed. Fuzzy inference networks based on the inference models and their learning algorithms are presented. The proposed fuzzy inference networks can learn fuzzy inference rules directly from training data. Two of the proposed fuzzy inference networks, Min-Max Fuzzy Inference Network and Min-Sum Fuzzy Inference Network, are applied to pattern classification problems. These two …