Digital Commons Network^™

Improved Decap Model And Placement Optimization Algorithm For Power Distribution Network Design, Jack Juang

Masters Theses

"Decoupling capacitors (decaps) are used in power distribution network (PDN) design to act as a low impedance return path for noise and act as a local source of charge when required by integrated circuits (IC). For placement of decaps, which can number even to the hundreds, many algorithms have been proposed including genetic algorithms (GA), iterative algorithm, and machine learning methods.

One limitation of iterative decap placement algorithms (adding one decap at a time) is how the construction of the algorithm affects the form of the final solution. For example, if the reward function (used in GA and machine learning …

A Physics-Based Pi Pre-Layout Tool For Pcb Pdn Design, Shuang Liang

Masters Theses

"With increasingly stringent requirements for lower voltage supply, and higher density in PCB PDN design, now integrity (PI) is an increasingly important aspect that must be considered. A pre-layout tool based on the Cavity Model and Boundary Element Method is built to automatically achieve a specified target impedance for a multi-layered Printed Circuit Board (PCB) Power Distribution Network (PDN) design with a minimal number of decoupling capacitors.

The pre-work about the post-layout design and analysis is proposed and the guidelines for creating a decoupling capacitors network with better performance has been built. With limit inputs, physical limitations for the minimal …

A Novel Power Integrity Modeling Method Based On Plane Pair Peec, Siqi Bai

Masters Theses

"A low impedance power distribution network (PDN) is essential for high frequency integrated circuits. A novel modeling mothed, i.e. the plane pair PEEC method is proposed in this thesis to model the PDN of the multi-layered printed circuit board. The modeling results agrees favorably with full wave simulation and measurement. A PDN tool is develop based on this method"--Abstract, page iii.

System Level Power Integrity Transient Analysis Using A Physics-Based Approach, Jun Xu

Masters Theses

"With decreasing supply voltage level and massive demanding current on system chipset, power integrity design becomes more and more critical for system stability. The ultimate goal of well-designed power delivery network (PDN) is to deliver desired voltage level from the source to destination, in other words, to minimize voltage noise delivered to digital devices. The thesis is composed of three parts. The first part focuses on-die level power models including simplified chip power model (CPM) for system level analysis and the worst scenario current profile. The second part of this work introduces the physics-based equivalent circuit model to simplify the …

A Hybrid Cavity And Parallel-Plate Peec Method For Analysis Of Complex Power Net Area Fills, And A Tool Development For Peak Distortion Analysis, Chenxi Huang

Masters Theses

"Modern ASICs and FPGAs are becoming more and more dense, which is causing an increasing demand of the current draw from the power distribution network (PDN). And one of the main design objectives of a power distribution network is to reduce the voltage noise ripple below a specified allowable limit. Although the target impedance is a commonly used criterion in most PDN designs, it may not be efficient because it's usually rather pessimistic. Herein a time domain voltage ripple decomposition approach is proposed to avoid overdesign as well as provide design guidance to PI engineers. Based on a physics-based circuit …

A Physics-Based Approach For Power Integrity In Multi-Layered Pcbs, Biyao Zhao

Masters Theses

"Developing a power distribution network (PDN) for ASICs and ICs to achieve the low-voltage ripple specifications for current digital designs is challenging with the high-speed and low-voltage ICs. Present methods are typically guided by best engineering practices for low impedance looking into the PDN from the IC. A pre-layout design methodology for power integrity in multi-layered PCB PDN geometry is proposed in the thesis. The PCB PDN geometry is segmented into four parts and every part is modelled using different methods based on the geometry details of the part. Physics-based circuit models are built for every part and the four …

Esd Related Soft Error Detection And Root Cause Analysis, Suyu Yang

Masters Theses

"In this article, several methods are outlined for detecting functional changes in an IC due to external interference such as ESD or EMI. The goal is to provide diagnostic tools for detection of potential soft failure susceptibilities of complex systems during the hardware design stage without the aid of any complex software. After the soft errors are found, circuit modeling techniques are used to characterize the DUT. By running the circuit model, the soft error threshold can be predicted and the circuit model can be used to evaluate the performance of other ESD protection methods. In the end several methods …