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Electrical and Computer Engineering

University of Tennessee, Knoxville

Masters Theses

2003

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Silicon-On-Insulator Power Management Integrated Circuit For Thin-Film Solid-State Lithium-Ion Micro-Batteries, Jeremy Ross Jackson Dec 2003

Silicon-On-Insulator Power Management Integrated Circuit For Thin-Film Solid-State Lithium-Ion Micro-Batteries, Jeremy Ross Jackson

Masters Theses

This thesis presents the design and implementation of a power management integrated circuit (IC) that is capable of both current and voltage charging thin-film, solid-state, lithium-ion micro-batteries. The power management system has been fabricated using a single-poly, 0.35-ìm, partially-depleted, silicon-on-insulator process (PD-SOI). The system contains a temperature stable current charger (current generator and a 4-bit current-mode DAC), a regulated voltage supply (voltage amplifier), and a voltage monitoring circuit (2-bit flash ADC). Experimental results of the first version of the power management system show proper functionality was obtained. The current charger produced a 2% worst-case variation in output current over the …


Silicon Carbide Gto Thyristor Loss Model For Hvdc Application, Madhu Sudhan Chinthavali Dec 2003

Silicon Carbide Gto Thyristor Loss Model For Hvdc Application, Madhu Sudhan Chinthavali

Masters Theses

With the increase in use of power electronics in transmission and distribution applications there is a growing demand for cost effective and highly efficient converters. Most of the utility applications have power electronics integrated in the system to improve the efficiency and functionality of the existing system. The development of semiconductor devices is vital for the growth of power electronic systems. Modern technologies like voltage source converter (VSC) based HVDC transmission has been made possible with the advent of power semiconductor devices like IGBT and GTO thyristor with their high power handling capability. Various material limitations of silicon power semiconductor …


Design Of A Wide-Swing Cascode Beta Multiplier Current Reference, Bradley David Miser Dec 2003

Design Of A Wide-Swing Cascode Beta Multiplier Current Reference, Bradley David Miser

Masters Theses

This thesis presents a study of the design of a wide-swing, cascode β multiplier current reference to be used as a biasing circuit. The current reference has been fabricated in a 0.5mm CMOS technology. First, a review of wide-swing cascode current mirrors and current-source self-biasing is covered. Then, the process of designing a current reference that is both wide-swing and has high output resistance is presented. Simulation and measurement results from the current reference are detailed. Improvements upon the current reference are also suggested.


Virtual And Augmented Reality Simulation Of Chattanooga Creek, Sirisha Vadlamudi Dec 2003

Virtual And Augmented Reality Simulation Of Chattanooga Creek, Sirisha Vadlamudi

Masters Theses

Virtual reality involves reproducing all the details of a physical object or environment that has to be simulated in virtual space. Augmented reality is the mixing of computer-generated information with the user’s view of the real world. Augmented reality is an alternative for virtual reality. This thesis presents the interactive virtual reality simulation and augmented reality simulation of Chattanooga Creek in Chattanooga, TN. The augmented reality part involves implementation of the basic concept of augmenting the virtual graphics to the real world.


A Preliminary Study Of The Effects Of Exposure To A One Atmosphere Uniform Glow Discharge Plasma (Oaugdptm) On The Surface Energy And Strength Of Meltblown And Nanofiber Fabrics, Weiwei Chen Dec 2003

A Preliminary Study Of The Effects Of Exposure To A One Atmosphere Uniform Glow Discharge Plasma (Oaugdptm) On The Surface Energy And Strength Of Meltblown And Nanofiber Fabrics, Weiwei Chen

Masters Theses

Electrohydrodynamic (EHD) methods have recently been developed to electrospin nano-scale non-woven webs and to improve their properties by exposure to the One Atmosphere Uniform Glow Discharge Plasma (OAUGDPä), as a collaborative effort by the UT Plasma Sciences Laboratory and the UT Textiles and Nonwovens Development Center (TANDEC).

Nanofiber webs are made by the electrospinning (ES) process, which uses the electrostatic force to spin fibers from a polymer solution or melt. Digitized SEM images show that the fiber diameters range from 10 nm to several microns. Such nanofiber fabrics have a significantly higher tensile strength than meltblown (MB) webs of the …


Performance Of Bit Error Rate And Power Spectral Density Of Ultra Wideband With Time Hopping Sequences., Joseph Martin Peek Dec 2003

Performance Of Bit Error Rate And Power Spectral Density Of Ultra Wideband With Time Hopping Sequences., Joseph Martin Peek

Masters Theses

This thesis focuses on several modulation methods for an ultra wideband (UWB) signal. These methods are pulse position modulation (PPM), binary phase shift keying (BPSK), on/off key shifting (OOK), and pulse amplitude modulation (PAM). In addition, time hopping is considered for these modulation schemes, where the capacity per time frame of time hopping PPM is studied using different spreading ratios. This thesis proves that with the addition of time hopping to all types of modulated UWB signals, the performance of power spectral density improves in all aspects, despite the increase of data per time frame. Note that despite the increase …


Development And Verification Of Parameterized Digital Signal Processing Macros For Microelectronic Systems, Adam Robert Miller Aug 2003

Development And Verification Of Parameterized Digital Signal Processing Macros For Microelectronic Systems, Adam Robert Miller

Masters Theses

Digital system design is a broad field that is growing every day. As technology grows, the complexity of systems grows also, which leads to longer design times. A Design-for-reuse policy can decrease design time by building flexibility into designs as they are created. By creating parameterized macros, they are more likely to be reused. Verifying the capabilities of macros is also important, and testing should be incorporated into each step of the design process. In this thesis, designing parameterized macros is discussed, with a Complex Fast Fourier Transform presented as an example of a complex algorithm, and three different Rounder …


Design And Verification Of The Data Encryption Standard For Asics And Fpgas, Xiaoquan Fu Aug 2003

Design And Verification Of The Data Encryption Standard For Asics And Fpgas, Xiaoquan Fu

Masters Theses

Encryption and decryption in a communication channel are used to provide security. In this thesis, the Data Encryption Standard (DES) is implemented with both FPGAs and ASICs. Different versions of FPGAs from different synthesis tools are compared. For ASIC implementation, the design space is explored to compile the design with different optimization targets like size, speed and power. Physical realizations of the design are obtained with Cadence tools. Simulations are made at each level to verify the implementations.


Approaches For Matlab Applications Acceleration Using High Performance Reconfigurable Computers, Saumil Girish Merchant Aug 2003

Approaches For Matlab Applications Acceleration Using High Performance Reconfigurable Computers, Saumil Girish Merchant

Masters Theses

A lot of raw computing power is needed in many scientific computing applications and simulations. MATLAB®† is one of the popular choices as a language for technical computing. Presented here are approaches for MATLAB based applications acceleration using High Performance Reconfigurable Computing (HPRC) machines. Typically, these are a cluster of Von Neumann architecture based systems with none or more FPGA reconfigurable boards. As a case study, an Image Correlation Algorithm has been ported on this architecture platform. As a second case study, the recursive training process in an Artificial Neural Network (ANN) to realize an optimum network has been accelerated, …


Comparison Of Bit Error Rate And Power Spectral Density On The Ultra Wideband Impulse Radio Systems, Ömer Sezer Aug 2003

Comparison Of Bit Error Rate And Power Spectral Density On The Ultra Wideband Impulse Radio Systems, Ömer Sezer

Masters Theses

Ultra-Wideband (UWB) is defined as a wireless transmission scheme that occupies a bandwidth of more than 25% of its center frequency. UWB Impulse Radio (UWB-IR) is a popular implementation of the UWB technology. In UWB-IR, information is encoded in baseband without any carrier modulation. Pulse shaping and baseband modulation scheme are two of the determinants on the performance of the UWB-IR.

In this thesis, both temporal and spectral characteristics of the UWB-IR are examined because all radio signals exist in both the time and frequency domains. Firstly, the bit error rate (BER) performance of the UWB-IR is investigated via simulation …


A Simulation Model For The Four-Phase Switched-Reluctance Motor, James T. Cox May 2003

A Simulation Model For The Four-Phase Switched-Reluctance Motor, James T. Cox

Masters Theses

The switched reluctance motor has become the topic of much discussion and research in the past few years. While it is one of the oldest motor types in existence, it has not made a big impact in industry, but because of its rugged and robust design, it has recently been viewed as a good candidate to replace other motor types as a workhorse for numerous applications. Notably among them are the traction applications such as vehicle drive. It is economical to manufacture and it is very rugged because of its simple construction. It is robust in that it is fault …


Size, Speed, And Power Analysis For Application-Specific Integrated Circuits Using Synthesis, Chung Ku May 2003

Size, Speed, And Power Analysis For Application-Specific Integrated Circuits Using Synthesis, Chung Ku

Masters Theses

An application-specific integrated circuit (ASIC) must not only provide the required functionality at the desired speed but it must also be economical. In the past, minimizing the size of the ASIC was sufficient to accomplish this goal. Today it is increasingly necessary that the ASIC also achieve minimum power dissipation or an optimal combination of speed, size and power, especially in communication and portable electronic devices. The research reported in this thesis describes the implementation of a Huffman encoder and a finite impulse response (FIR) filter using a hardware description language (HDL) and the testing of the corresponding register transfer …


Design And Analysis Of A Wide Loop-Bandwidth Rf Synthesizer Using Ring Oscillator For Dect Receiver, Md. Hafijur Rahman May 2003

Design And Analysis Of A Wide Loop-Bandwidth Rf Synthesizer Using Ring Oscillator For Dect Receiver, Md. Hafijur Rahman

Masters Theses

Wireless communication devices including cordless phones and modern digital cellular systems (DCSs) use portable transceiver systems. The frequency synthesis of this type of transceiver system is done using a phase-locked loop oscillator. Traditional on-chip implementation of a complete phase-locked loop using a ring type voltage controlled oscillator contributes higher noise at the output. An alternative architecture, phase-locked loop (PLL) with wide loop-bandwidth, is proposed in this research to suppress the noise from the traditional ring oscillator. The proposed PLL is amendable to on-chip integration as well as commercially suitable for a Digital Enhancement Cordless Telephone (DECT) system which needs flexible …


A Low Power Cmos Microluminometer And Transmitter For Bioluminescent Bioreporter Integrated Circuit (Bbic), Mo Zhang May 2003

A Low Power Cmos Microluminometer And Transmitter For Bioluminescent Bioreporter Integrated Circuit (Bbic), Mo Zhang

Masters Theses

This thesis is a study of the design of a low power CMOS microluminometer and transmitter for bioluminescent bioreporter integrated circuit (BBIC). A BBIC sensor chip with lower consumption was fabricated in the 0.35μm CMOS process. This design was an improvement over a previous BBIC [1]. The previous BBIC was designed using a different CMOS process (0.5μm) and a different CAD tool (Magic). This thesis work involves redesign of the chip in 0.35μm CMOS process using Cadence design tool with improvement for power dissipation. Larger resisters are used instead of several small resisters, which were placed between power supply and …