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New Identification And Decoding Techniques For Low-Density Parity-Check Codes, Tian Xia Jan 2015

New Identification And Decoding Techniques For Low-Density Parity-Check Codes, Tian Xia

LSU Doctoral Dissertations

Error-correction coding schemes are indispensable for high-capacity high data-rate communication systems nowadays. Among various channel coding schemes, low-density parity-check (LDPC) codes introduced by pioneer Robert G. Gallager are prominent due to the capacity-approaching and superior error-correcting properties. There is no hard constraint on the code rate of LDPC codes. Consequently, it is ideal to incorporate LDPC codes with various code rate and codeword length in the adaptive modulation and coding (AMC) systems which change the encoder and the modulator adaptively to improve the system throughput. In conventional AMC systems, a dedicated control channel is assigned to coordinate the encoder/decoder changes. …


Exploiting Heterogeneity In Chip-Multiprocessor Design, Ying Zhang Jan 2013

Exploiting Heterogeneity In Chip-Multiprocessor Design, Ying Zhang

LSU Doctoral Dissertations

In the past decade, semiconductor manufacturers are persistent in building faster and smaller transistors in order to boost the processor performance as projected by Moore’s Law. Recently, as we enter the deep submicron regime, continuing the same processor development pace becomes an increasingly difficult issue due to constraints on power, temperature, and the scalability of transistors. To overcome these challenges, researchers propose several innovations at both architecture and device levels that are able to partially solve the problems. These diversities in processor architecture and manufacturing materials provide solutions to continuing Moore’s Law by effectively exploiting the heterogeneity, however, they also …


Integrating Multiple Clusters For Compute-Intensive Applications, Zhifeng Yun Jan 2011

Integrating Multiple Clusters For Compute-Intensive Applications, Zhifeng Yun

LSU Doctoral Dissertations

Multicluster grids provide one promising solution to satisfying the growing computational demands of compute-intensive applications. However, it is challenging to seamlessly integrate all participating clusters in different domains into a single virtual computational platform. In order to fully utilize the capabilities of multicluster grids, computer scientists need to deal with the issue of joining together participating autonomic systems practically and efficiently to execute grid-enabled applications. Driven by several compute-intensive applications, this theses develops a multicluster grid management toolkit called Pelecanus to bridge the gap between user's needs and the system's heterogeneity. Application scientists will be able to conduct very large-scale …


Power And Memory Optimization Techniques In Embedded Systems Design, Atef Khalil Allam Jan 2005

Power And Memory Optimization Techniques In Embedded Systems Design, Atef Khalil Allam

LSU Doctoral Dissertations

Embedded systems incur tight constraints on power consumption and memory (which impacts size) in addition to other constraints such as weight and cost. This dissertation addresses two key factors in embedded system design, namely minimization of power consumption and memory requirement. The first part of this dissertation considers the problem of optimizing power consumption (peak power as well as average power) in high-level synthesis (HLS). The second part deals with memory usage optimization mainly targeting a restricted class of computations expressed as loops accessing large data arrays that arises in scientific computing such as the coupled cluster and configuration interaction …