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Design And Evaluation Of A Sub-1-Volt Read Flash Memory In A Standard 130 Nanometer Cmos Process, David Andrew Basford
Design And Evaluation Of A Sub-1-Volt Read Flash Memory In A Standard 130 Nanometer Cmos Process, David Andrew Basford
Masters Theses
Nonvolatile memory design is a discipline that employs digital and analog circuit design techniques and requires knowledge of semiconductor physics and quantum mechanics. Methods for programming and erasing memory are discussed here, and simulation models are provided for Impact Hot Electron Injection (IHEI), Fowler-Nordheim (FN) tunneling, and direct tunneling. Extensive testing of analog memory cells was used to derive a set of equations that describe the oating-gate characteristics. Measurements of charge retention also revealed several leakage mechanisms, and methods for mitigating leakage are presented.
Fabrication of ash memory in a standard CMOS process presents significant design challenges. The absence of …
Danna A Neuromorphic Computing Vlsi Chip, Christopher Paul Daffron
Danna A Neuromorphic Computing Vlsi Chip, Christopher Paul Daffron
Masters Theses
Dynamic Adaptive Neural Network Arrays (DANNAs) are neuromorphic systems that exhibit spiking behaviors and can be designed using evolutionary optimization. Array elements are rapidly reconfigurable and can function as either neurons or synapses with programmable interconnections and parameters. Currently, DANNAs are implemented using a Field Programmable Gate Array (FPGA) and are constrained by this technology. To alleviate these constraints and introduce new and improved features, a semi-custom Very Large Scale Integration (VLSI) implementation has been created. This implementation improves upon the FPGA implementation in three key areas. The density of the array is improved, with 5,625 elements on a single …