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Design Of A Shared Coherent Cache For A Multiple Channel Architecture, John A. Reisner
Design Of A Shared Coherent Cache For A Multiple Channel Architecture, John A. Reisner
Theses and Dissertations
The Multiple Channel Architecture MCA is a recently proposed computer architecture which uses fiber optic communications to overcome many of the problems associated with interconnection networks. There exists a detailed MCA simulator which faithfully simulates an MCA system, however, the original version of the simulator did not cache shared data. In order to improve the performance of the MCA, a cache coherency protocol was developed and implemented in the simulator. The protocol has two features which are significant: (1) a time-division multiplexed TDM communication bus is used for coherency traffic, and (2) the shared data is cached in an independent …
A Performance Prediction Model For A Fault-Tolerant Computer During Recovery And Restoration, Rodrigo A. Obando
A Performance Prediction Model For A Fault-Tolerant Computer During Recovery And Restoration, Rodrigo A. Obando
Electrical & Computer Engineering Theses & Dissertations
The modeling and design of a fault-tolerant multiprocessor system is addressed in this dissertation. In particular, the behavior of the system during recovery and restoration after a fault has occurred is investigated. Given that a multicomputer system is designed using the Algorithm to Architecture To Mapping Model (ATAMM) model, and that a fault (death of a computing resource) occurs during its normal steady-state operation, a model is presented as a viable research tool for predicting the performance bounds of the system during its recovery and restoration phases. Furthermore, the bounds of the performance behavior of the system during this transient …