VLSI and Circuits, Embedded and Hardware Systems Commons^™

Resistive Switching In Fto/Cuo-Cu2o/Au Memory Devices, Amir Shariffar, Haider Salman, Tanveer A. Siddique, Wafaa Gebril, M. Omar Manasreh

Electrical Engineering Faculty Publications and Presentations

Memristors are considered to be next-generation non-volatile memory devices owing to their fast switching and low power consumption. Metal oxide memristors have been extensively investigated and reported to be promising devices, although they still suffer from poor stability and laborious fabrication process. Herein, we report a stable and power-efficient memristor with novel heterogenous electrodes structure and facile fabrication based on CuO-Cu2O complex thin films. The proposed structure of the memristor contains an active complex layer of cupric oxide (CuO) and cuprous oxide (Cu2O) sandwiched between fluorine-doped tin oxide (FTO) and gold (Au) electrodes. The fabricated memristors demonstrate bipolar resistive switching …

Studies And Progresses On Hole Metallization In High-Density Interconnected Printed Circuit Boards, Zhao-Yun Wang, Shi-Gang Sun

Journal of Electrochemistry

Printed circuit boards (PCBs) are almost the core components of all electronic systems. With the rapid development of sciences and technologies, PCBs are gradually developing in the direction of multi-layer, thin and high-density wiring due to the functionalization, miniaturization, lightweight and high reliability of electronic products, as well as the widespread popularization of the subminiature package such as chip scale package (CSP) and ball grid array (BGA). Therefore, High-density interconnected printed circuit boards (HDI-PCBs) arise. Hole metallization is one of the core technologies in HDI-PCBs and includes two processes composed of conductive treatment and electron electroplating. Electroless copper plating, as …

Research Progresses Of Copper Interconnection In Chips, Jin Lei, Zhan Dong-Ping, Tian Zhong-Qun

Journal of Electrochemistry

In this paper, the copper interconnection technology in chip manufacturing is introduced in detail, and the essentials of acidic copper sulfate electroplating process and the mechanisms of common-used additives are reviewed. The progresses of novel additives at home and abroad are also summarized. Based on the studied achievement, the possibility of the novel copper interconnect process replacing the acidic copper electroplating is prospected.

Performance Evaluation, Comparison And Improvement Of The Hardware Implementations Of The Advanced Encryption Standard S-Box, Doaa Ashmawy

Electronic Thesis and Dissertation Repository

The Advanced Encryption Standard (AES) is the most popular algorithm used in symmetric key cryptography. The efficient computation of AES is essential for many computing platforms. The S-box is the only nonlinear transformation step of the AES algorithm. Efficient implementation of the AES S-box is very crucial for AES hardware. The AES S-box could be implemented by using look-up table method or by using finite field arithmetic. The finite field arithmetic design approach to implement the AES S-box is superior in saving the hardware resources. The main objective of this thesis is to evaluate, compare and improve the hardware implementations …

A 2.56 Gbps Serial Wireline Transceiver That Supports An Auxiliary Channel And A Hybrid Line Driver To Compensate Large Channel Loss, Xiaoran Wang

Electrical Engineering Theses and Dissertations

Serial transceiver links are widely used for high-speed point-to-point communications. This dissertation describes two transceiver link designs for two different applications.

In serial wireline communications, security is an increasingly important factor to concern. Securing an information processing system at the application and system software layers is regarded as a necessary but incomplete defense against the cyber security threats. In this dissertation, an asynchronous serial transceiver that is capable of transmitting and receiving an auxiliary data stream concurrently with the primary data stream is described. The transceiver instantiates the auxiliary data stream by modulating the phase of the primary data without …

Signals And Systems, Jingxian Wu

Open Educational Resources

Signals and Systems is a core Electrical Engineering undergraduate course. This course covers the topics of signal and system analysis, with an emphasis on the analysis of linear time-invariant systems. The materials presented in this course are designed for a 15-week course for junior or senior level students. The open access materials for this course include:

Course outline and guides: a detailed guideline that provides a week-by-week teaching schedule for a 15-week semester.

Lecture notes: a complete set of lecture notes with detailed explanations and a large number of examples that cover all the contents that are offered in this …

Investigating Single Precision Floating General Matrix Multiply In Heterogeneous Hardware, Steven Harris

McKelvey School of Engineering Theses & Dissertations

The fundamental operation of matrix multiplication is ubiquitous across a myriad of disciplines. Yet, the identification of new optimizations for matrix multiplication remains relevant for emerging hardware architectures and heterogeneous systems. Frameworks such as OpenCL enable computation orchestration on existing systems, and its availability using the Intel High Level Synthesis compiler allows users to architect new designs for reconfigurable hardware using C/C++. Using the HARPv2 as a vehicle for exploration, we investigate the utility of several of the most notable matrix multiplication optimizations to better understand the performance portability of OpenCL and the implications for such optimizations on this and …

Data Processing Electronics For An Ultra-Fast Single-Photon Counting Camera, Jackson Hyde

McKelvey School of Engineering Theses & Dissertations

Localizing photon arrivals with high spatial (megapixel) and temporal (sub-nanosecond) resolution would be transformative for a number of applications, including single-molecule super-resolution fluorescence microscopy. Here, the Data Processing Field Programmable Gate Array (FPGA) is developed as an ultra-fast computational platform built on an FPGA for a microchannel plate (MCP)-photomultiplier tube (PMT) based single-photon counting camera. Each photon is converted by the MCP-PMT into an electron cloud that generates current pulses across a 50×50 cross-strip anode. The Data Processing FPGA executes a massively parallel center-of-gravity coordinate determination algorithm on the digitized current pulses to determine a 2D position and time of …

Formal Verification Of Divider And Square-Root Arithmetic Circuits Using Computer Algebra Methods, Atif Yasin

Doctoral Dissertations

A considerable progress has been made in recent years in verification of arithmetic circuits such as multipliers, fused multiply-adders, multiply-accumulate, and other components of arithmetic datapaths, both in integer and finite field domain. However, the verification of hardware dividers and square-root functions have received only a limited attention from the verification community, with a notable exception for theorem provers and other inductive, non-automated systems. Division, square root, and transcendental functions are all tied to the basic Intel architecture and proving correctness of such algorithms is of grave importance. Although belonging to the same iterative-subtract class of architectures, they widely differ …

Compound Effects Of Clock And Voltage Based Power Side-Channel Countermeasures, Jacqueline Lagasse

Masters Theses

The power side-channel attack, which allows an attacker to derive secret information from power traces, continues to be a major vulnerability in many critical systems. Numerous countermeasures have been proposed since its discovery as a serious vulnerability, including both hardware and software implementations. Each countermeasure has its own drawback, with some of the highly effective countermeasures incurring large overhead in area and power. In addition, many countermeasures are quite invasive to the design process, requiring modification of the design and therefore additional validation and testing to ensure its accuracy. Less invasive countermeasures that do not require directly modifying the system …

Device-Level Predictive Modeling Of Extreme Electromagnetic Interference, Nishchay H. Sule

Electrical and Computer Engineering ETDs

Radio Frequency (RF) interference is a prominent issue for modern electronic devices. As device size and supply power shrink to meet the on-going demand for compact and complex Integrated Circuits (ICs), their susceptibility to external noise coupling to the input or power supply increases significantly. One such type of noise that acts upon a system to be considered is Extreme Electromagnetic Interference (EEMI). Previous works done to understand and evaluate the impact of EEMI onto a system or sub-system have been conducted on a statistical or empirical analysis level, which has led to complex and convoluted analysis, that requires significant …

Design Of Control System With Feedback Loop For A Pulsatile Pump, Ian Scott Sanders

Graduate Theses and Dissertations

This paper describes the design and implementation of a closed-loop proportional, integral, differential (PID) control system for a custom in-house pulsatile pump apparatus for the University of Arkansas Biomedical Department. The control system is designed to control a MOONS’ PL34HD0L8500 hybrid stepper motor using a dual H-bridge motor driver network with four pulse-width modulated (PWM) inputs to drive a pulsatile pump apparatus at motor stepping frequencies up to 2kHz. The speed of the motor is controlled from a pressure profile transmitted from an external source over RS-232 communication that specifies the motor speed, number of datapoints, and an array of …

Polyone Smartphone, Joshua Zalmanowitz, Chi Nguyen, Gerome Cacho, Chris Lim

Electrical Engineering

The Poly One Smartphone is a student designed smartphone built to explore the implementation of 5G, provide a hardware solution to ensure personal information security and privacy, and provide longer battery life. The key features of this smartphone include but are not limited to a main cpu, some form of network connectivity in the form of Wi-fi or Cellular Data, calling functionality, a rechargeable battery that works with common power connection protocols, and compatibility with popular applications.

Secure Network-On-Chip Against Black Hole And Tampering Attacks, Luka Daoud

Boise State University Theses and Dissertations

The Network-on-Chip (NoC) has become the communication heart of Multiprocessors-System-on-Chip (MPSoC). Therefore, it has been subject to a plethora of security threats to degrade the system performance or steal sensitive information. Due to the globalization of the modern semiconductor industry, many different parties take part in the hardware design of the system. As a result, the NoC could be infected with a malicious circuit, known as a Hardware Trojan (HT), to leave a back door for security breach purposes. HTs are smartly designed to be too small to be uncovered by offline circuit-level testing, so the system requires an online …

Area Efficient Device Optimization For Esd Protection In High Speed Interface Ics, Dan Thomas Jarard

Graduate Theses and Dissertations

Electrostatic discharge (ESD) protection is considered as a vital step in integrated circuit (IC) manufacturing process. IC chips are unable to overcome the effects of transient events without adequate discharge protection. Recent trend in the industry has seen the incorporation of system level ESD protection within the IC chip. Incorporating system level on-chip ESD protection often increases cost, degrades circuit performance and consumes layout area which could otherwise be used for improving the circuit performance. These design challenges could be easily overcome if the parasitic components in a circuit were used for ESD protection. Despite the various design challenges, on-chip …

Investigations Of New Fault-Tolerant Methods For Multilevel Inverters, Haider Mhiesan

Graduate Theses and Dissertations

The demands of power electronics with high power capability have increased in the last decades. These needs have driven the expansion of existing power electronics topologies and developing new power electronics generations. Multilevel inverters (MLI) are one of the most promising power electronics circuits that have been implemented and commercialized in high-voltage direct current (HVDC), motor drives, and battery energy storage systems (BESS). The expanding uses of the MLI have lead to creation of new topologies for different applications. However, one of the disadvantages of using MLIs is their complexity. MLIs consist of a large number of switching devices, which …

Built-In Self-Test (Bist) For Multi-Threshold Null Convention Logic (Mtncl) Circuits, Brett Sparkman

Graduate Theses and Dissertations

This dissertation proposes a Built-In Self-Test (BIST) hardware implementation for Multi-Threshold NULL Convention Logic (MTNCL) circuits. Two different methods are proposed: an area-optimized topology that requires minimal area overhead, and a test-performance-optimized topology that utilizes parallelism and internal hardware to reduce the overall test time through additional controllability points. Furthermore, an automated software flow is proposed to insert, simulate, and analyze an input MTNCL netlist to obtain a desired fault coverage, if possible, through iterative digital and fault simulations. The proposed automated flow is capable of producing both area-optimized and test-performance-optimized BIST circuits and scripts for digital and fault simulation …

Sunseeker Display And Driver Controller, Alec Kwapis

Honors Theses

Digital dashboard displays with critical driver information are found in all modern vehicles. Examples of such information available to the driver include a speedometer, odometer, engine RPM, fuel gauge and more. The current 2016 Sunseeker solar car already has numerous displays that can show critical information to the driver, however, there are several problems that exist. Each display itself is less than two inches in size, the text on the screens is difficult to read, and the measurements have no units. Furthermore, these displays were made by a company that no longer exists, thus preventing the solar car team from …

Heuristic-Based Threat Analysis Of Register-Transfer-Level Hardware Designs, Wesley Layton Ellington

Electrical Engineering Theses and Dissertations

The development of globalized semiconductor manufacturing processes and supply chains has lead to an increased interest in hardware security as new types of hardware based attacks, called hardware Trojans, are being observed in industrial and military electronics. To combat this, a technique was developed to help analyze hardware designs at the register-transfer-level (RTL) and locate points of interest within a design that might be vulnerable to attack. This method aims to eventually enable the creation of an end-to-end design hardening solution that analyzes existing designs and suggests countermeasures for potential Trojan attacks. The method presented in this work uses a …

Analysis And Verification Of Arithmetic Circuits Using Computer Algebra Approach, Tiankai Su

Doctoral Dissertations

Despite a considerable progress in verification of random and control logic, advances in formal verification of arithmetic designs have been lagging. This can be attributed mostly to the difficulty of efficient modeling of arithmetic circuits and data paths without resorting to computationally expensive Boolean methods, such as Binary Decision Diagrams (BDDs) and Boolean Satisfiability (SAT) that require ``bit blasting'', i.e., flattening the design to a bit-level netlist. Similarly, approaches that rely on computer algebra and Satisfiability Modulo Theories (SMT) methods are either too abstract to handle the bit-level complexity of arithmetic designs or require solving computationally expensive decision or satisfiability …