A Phase-Locked Loop In High-Temperature Silicon Carbide And General Design Methods For Silicon Carbide Integrated Circuits, 2014 University of Arkansas, Fayetteville
A Phase-Locked Loop In High-Temperature Silicon Carbide And General Design Methods For Silicon Carbide Integrated Circuits, Paul Shepherd
Graduate Theses and Dissertations
Silicon carbide (SiC) has long been considered for integrated circuits (ICs). It offers several advantages, including wider temperature range, larger critical electric field, and greater radiation immunity with respect to Silicon (Si). At the same time, it suffers from challenges in fabrication consistency and lower transconductance which the designer must overcome. One of the recent SiC IC processes developed is the Raytheon High-Temperature Silicon Carbide (HTSiC) complementary MOSFET process. This process is one of the first to offer P channel MOSFETs and, as a result, a greater variety of circuits can be built in it.
The behavior of SiC MOSFETs …
Design, Simulation And Implementation Of Three-Phase Bidirectional Dc-Dc Dual Active Bridge Converter Using Sic Mosfets, 2014 University of Arkansas, Fayetteville
Design, Simulation And Implementation Of Three-Phase Bidirectional Dc-Dc Dual Active Bridge Converter Using Sic Mosfets, Tariq Aldawsari
Graduate Theses and Dissertations
The use of SiC-based martials in fabricating power semiconductor devices has shown more interest than conventional silicon-based. Its promising abilities to improve the performance of power electronic systems made it a valuable choice in building high power DC-DC converters. This thesis presents the design and implementation of a three-phase bidirectional DC-DC Dual Active Bridge using SiC MOSFETs. The proposed circuit is first built in Matlab for simulation analysis. Then a phase shift modulation controller is designed in Simulink to test the simulation circuit. The controls are then integrated through an FPGA to test the prototype. Simulations and experimental results are …
Design Of A High Performance Silicon Carbide Cmos Operational Amplifier, 2014 University of Arkansas, Fayetteville
Design Of A High Performance Silicon Carbide Cmos Operational Amplifier, Shaila Amin Bhuyan
Graduate Theses and Dissertations
This thesis presents the design, simulation, layout and test results of a silicon carbide (SiC) CMOS two-stage operational amplifier (op amp) with NMOS input stage. The circuit has been designed to provide a stable open-loop voltage gain (60 dB), unity-gain bandwidth (around 5 MHz) and maintain a high CMRR and PSRR within a useful input common mode range over process corners and a wide temperature range (25 °C - 300 °C). Between the two stages a Miller compensation topology is placed to improve the phase margin (around 45°). Due to the comparatively high threshold voltage values of transistors in SiC, …
Technology Mapping, Design For Testability, And Circuit Optimizations For Null Convention Logic Based Architectures, 2014 University of Arkansas, Fayetteville
Technology Mapping, Design For Testability, And Circuit Optimizations For Null Convention Logic Based Architectures, Farhad Alibeygi Parsan
Graduate Theses and Dissertations
Delay-insensitive asynchronous circuits have been the target of a renewed research effort because of the advantages they offer over traditional synchronous circuits. Minimal timing analysis, inherent robustness against power-supply, temperature, and process variations, reduced energy consumption, less noise and EMI emission, and easy design reuse are some of the benefits of these circuits. NULL Convention Logic (NCL) is one of the mainstream asynchronous logic design paradigms that has been shown to be a promising method for designing delay-insensitive asynchronous circuits.
This dissertation investigates new areas in NCL design and test and is made of three sections. The first section discusses …
A Low-Power Approach For Front End Biological Signal Conditioning, 2014 University of Tennessee - Knoxville
A Low-Power Approach For Front End Biological Signal Conditioning, Logan Smith Taylor
Masters Theses
In a lab-on-a-chip (LOC) application, the measurement of small analog signals such as local temperature variation often involves detection of very low-level signals in a noisy micro-scale environment. This is true for other biomedical monitoring systems as well. These systems observe various physiological parameters or electrochemical reactions that need to be tracked electrically. For temperature measurement pyroelectric transducers represent an efficient solution in terms of speed, sensitivity, and scale of integration, especially when prompt and accurate temperature monitoring is desired.
The ability to perform laboratory operations on a small scale using miniaturized LOC devices is a promising biosensing technique. The …
Low-Power Analog Processing, 2014 University of Nebraska-Lincoln
Low-Power Analog Processing, Daniel J. White
Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research
This dissertation presents the analog harmonic transform (AHT) and a first implementation in an integrated circuit. The transform is designed for a regular and simple hardware structure. It provides coefficients relating to an input signal's spectrum. These coefficients also have a simple relationship to the signal's Fouri\'er series coefficients.
The AHT is defined in its ideal form and evaluated for two example signal classification applications. Both military vehicle and bearing fault classification tasks are presented which validate the ability of a neural network to use the AHT coefficients to correctly classify the input signals. Because any real use of the …
Effect Of Clock And Power Gating On Power Distribution Network Noise In 2d And 3d Integrated Circuits, 2014 University of Massachusetts Amherst
Effect Of Clock And Power Gating On Power Distribution Network Noise In 2d And 3d Integrated Circuits, Vinay C. Patil
Masters Theses
In this work, power supply noise contribution, at a particular node on the power grid, from clock/power gated blocks is maximized at particular time and the synthetic gating patterns of the blocks that result in the maximum noise is obtained for the interval 0 to target time. We utilize wavelet based analysis as wavelets are a natural way of characterizing the time-frequency behavior of the power grid. The gating patterns for the blocks and the maximum supply noise at the Point of Interest at the specified target time obtained via a Linear Programming (LP) formulation (clock gating) and Genetic Algorithm …
Parallel Multi-Core Verilog Hdl Simulation, 2014 University of Massachusetts Amherst
Parallel Multi-Core Verilog Hdl Simulation, Tariq B. Ahmad
Doctoral Dissertations
In the era of multi-core computing, the push for creating true parallel applications that can run on individual CPUs is on the rise. Application of parallel discrete event simulation (PDES) to hardware design verification looks promising, given the complexity of today’s hardware designs. Unfortunately, the challenges imposed by lack of inherent parallelism, suboptimal design partitioning, synchronization and communication overhead, and load balancing, render this approach largely ineffective. This thesis presents three techniques for accelerating simulation at three levels of abstraction namely, RTL, functional gate-level (zero-delay) and gate-level timing. We review contemporary solutions and then propose new ways of speeding up …
Design And Evaluation Of An L-Band Current-Mode Class-D Power Amplifier Integrated Circuit, 2014 University of Massachusetts Amherst
Design And Evaluation Of An L-Band Current-Mode Class-D Power Amplifier Integrated Circuit, Michael J. Shusta
Masters Theses
Power amplifiers (PAs) convert energy from DC to high frequencies in all radio and microwave transmitter systems be they wireless base stations, handsets, radars, heaters, and so on. PAs are the dominant consumers of energy in these systems and, therefore, the dominant sources of system cost and inefficiency. Research has focused on efficient solid-state PA circuit topologies and their optimization since the 1960s. The 2000s saw the current-mode class-D (CMCD) topology, potentially suitable for today's wireless communications systems, show promise in the UHF frequency band. This thesis describes the design and testing of a high-efficiency CMCD amplifier with an integrated …
Efficient Fpga Architectures For Separable Filters And Logarithmic Multipliers And Automation Of Fish Feature Extraction Using Gabor Filters, 2014 University of New Orleans
Efficient Fpga Architectures For Separable Filters And Logarithmic Multipliers And Automation Of Fish Feature Extraction Using Gabor Filters, Arjun Kumar Joginipelly
University of New Orleans Theses and Dissertations
Convolution and multiplication operations in the filtering process can be optimized by minimizing the resource utilization using Field Programmable Gate Arrays (FPGA) and separable filter kernels. An FPGA architecture for separable convolution is proposed to achieve reduction of on-chip resource utilization and external memory bandwidth for a given processing rate of the convolution unit.
Multiplication in integer number system can be optimized in terms of resources, operation time and power consumption by converting to logarithmic domain. To achieve this, a method altering the filter weights is proposed and implemented for error reduction. The results obtained depict significant error reduction when …
Wave-Shaped Mask Of Fabricating Nano-Scaled Structure, 2014 National Taiwan University
Wave-Shaped Mask Of Fabricating Nano-Scaled Structure, Fang-Tzu Chuang
Fang-Tzu Chuang
A wave-shaped mask for fabricating a nano-scale structure is disclosed. The wave-shaped mask comprises an elastomeric transparent substrate having an upper surface and a lower surface, and a light-penetrable thin film layer disposed on the upper surface of the elastomeric transparent substrate. The upper surface of the elastomeric transparent substrate and the light-penetrable thin film layer are in a periodic wave shape, and the lower surface of the elastomeric transparent substrate is in a plate shape.
Digital-To-Analog Converter Interface For Computer Assisted Biologically Inspired Systems, 2014 University of Tennessee - Knoxville
Digital-To-Analog Converter Interface For Computer Assisted Biologically Inspired Systems, Nicholas Conley Poore
Masters Theses
In today's integrated circuit technology, system interfaces play an important role of enabling fast, reliable data communications. A key feature of this work is the exploration and development of ultra-low power data converters. Data converters are present in some form in almost all mixed-signal systems; in particular, digital-to-analog converters present the opportunity for digitally controlled analog signal sources. Such signal sources are used in a variety of applications such as neuromorphic systems and analog signal processing. Multi-dimensional systems, such as biologically inspired neuromorphic systems, require vectors of analog signals. To use a microprocessor to control these analog systems, we must …
Idpal – A Partially-Adiabatic Energy-Efficient Logic Family: Theory And Applications To Secure Computing, 2014 Old Dominion University
Idpal – A Partially-Adiabatic Energy-Efficient Logic Family: Theory And Applications To Secure Computing, Mihail T. Cutitaru
Electrical & Computer Engineering Theses & Dissertations
Low-power circuits and issues associated with them have gained a significant amount of attention in recent years due to the boom in portable electronic devices. Historically, low-power operation relied heavily on technology scaling and reduced operating voltage, however this trend has been slowing down recently due to the increased power density on chips. This dissertation introduces a new very-low power partially-adiabatic logic family called Input-Decoupled Partially-Adiabatic Logic (IDPAL) with applications in low-power circuits. Experimental results show that IDPAL reduces energy usage by 79% compared to equivalent CMOS implementations and by 25% when compared to the best adiabatic implementation. Experiments ranging …
From Verification To Implementation: A Model Translation Tool And A Pacemaker Case Study, 2014 University of Pennsylvania
From Verification To Implementation: A Model Translation Tool And A Pacemaker Case Study, Miroslav Pajic, Zhihao Jiang, Insup Lee, Oleg Sokolsky, Rahul Mangharam
Oleg Sokolsky
Model-Driven Design (MDD) of cyber-physical systems advocates for design procedures that start with formal modeling of the real-time system, followed by the model’s verification at an early stage. The verified model must then be translated to a more detailed model for simulation-based testing and finally translated into executable code in a physical implementation. As later stages build on the same core model, it is essential that models used earlier in the pipeline are valid approximations of the more detailed models developed downstream. The focus of this effort is on the design and development of a model translation tool, UPP2SF, and …
Road Profile Sensor: A Detection Method For Active Suspension Systems, 2014 Seattle Pacific University
Road Profile Sensor: A Detection Method For Active Suspension Systems, Matthew Edel
Honors Projects
Abstract—Active suspension systems adjust the suspension components of an automobile to adapt to bumps or potholes that are encountered in the road as the vehicle is driving. These systems have the potential to improve safety, performance, and ride comfort in automobiles. An integral part of active suspension systems is a device to detect irregularities in the road. Current detection systems that are available lack either in precision, resolution, or speed. A senior design project, Dynamic Automatic Adjusting Suspension (DAAS), at Seattle Pacific University expressed a need for a high-performance road scanner that could be paired with their suspension system. The …
Bike Safe: An Automatic Turn Signal System, 2014 California Polytechnic State University - San Luis Obispo
Bike Safe: An Automatic Turn Signal System, Betty He Chan, Ricardo Alberto Duran
Electrical Engineering
Bicycles are vehicles that do not require a license to operate and share the road with cars, motorcycles, and other fast moving vehicles. An improper lane change from a bicyclist, such as one without any warning, can lead to great injury or death (especially after sundown). Bike Safe addresses this safety concern by providing a low-cost device that mimics the warning system motorists’ use every day. The system consists of a red brake light and amber turning signal lights that mounts to the rear of the bike, as well as a white headlamp that mounts to the front handlebars. The …
Low Voltage Cmos Sar Adc Design, 2014 California Polytechnic State University - San Luis Obispo
Low Voltage Cmos Sar Adc Design, Ryan Hunt
Electrical Engineering
This project centers on the design of a single ended 10-bit successive approximation register analog to digital converter (SAR ADC for short) that easily interfaces to a micro-controller, such as an Arduino. With micro-controller interfacing in mind, the universal data transfer technique of SPI proved an easy way to communicate between the ADC and the micro-controller. The ADC has a range of 1V (highest code value) to 0V (lowest code value) and operates from a single voltage rail value of 1.8V. Typical SPI clock speeds run on the order of 2MHz and with a 10-bit ADC this means a sampling …
Ad-Hoc Hid: Modular Wireless Human Interface Device, 2014 California Polytechnic State University - San Luis Obispo
Ad-Hoc Hid: Modular Wireless Human Interface Device, Joseph A. Mazzanti
Electrical Engineering
Ad-Hoc HID is a modular, reprogrammable Human Interface Device. This device is intended to function as a keyboard, gamepad, or mouse, according to the user's needs. The final project is intended to be switch agnostic, making the final product adaptable to the user’s needs.
Real Time Swim Instructor, 2014 California Polytechnic State University - San Luis Obispo
Real Time Swim Instructor, Konrad Antoniuk
Electrical Engineering
Both competitive and recreational swimmers want an efficient swim stroke but often lack consistent feedback with technical insight. Competitive swimmers rely on coaches for instruction but have to stop swimming to listen. The Real Time Swim Instructor project provides live feedback to a swimmer so they can feel their stroke correction while they’re swimming. The developing swimmer feels the difference between correct and incorrect form instantaneously.
The project takes on the responsibility of measuring the moving body, accurately determining stroke improvement, functioning under water, and providing recognizable feedback. Additionally, the user can review their swim from data stored in memory. …
Continuous Hand-Tool Leveling Device, 2014 California Polytechnic State University - San Luis Obispo
Continuous Hand-Tool Leveling Device, Shaun Villa Koide
Electrical Engineering
To produce clean and precise cuts, hand-tools (e.g. knives and saws) must maintain a consistent angle of orientation during the entire cutting process. The Continuous Hand-Tool Leveling Device mounts on the desired hand-tool and the user inputs the desired angle of the cutting plane. The device utilizes a microcontroller unit (MCU) and accelerometer to implement real-time angle measurement. When using a hand-tool, the device uses an LED that indicates that the hand-tool’s angle deviates from the user-set desired angle, which prevents any potential mistakes from occurring due to user error. The device easily mounts on many common cutting tools. Additionally, …